LatticeECP2M FPGA Supports JESD204 High Speed Serial Specification

Lattice Semiconductor Corporation (NASDAQ: LSCC) announced the successful interoperation of its LatticeECP2M(tm) FPGA family with the Linear Technology LTC2274, 16-bit, 105Msps, high-speed ADC (Analog to Digital Converter) in support of the JESD204 high-speed serial specification from the JEDEC group. This capability has been demonstrated utilizing standard evaluation boards from both companies.

“This standard allows front-end data acquisition to reap the benefits of a low overhead, high-speed serial link to support pure data transport,” said Stan Kopec, Lattice corporate vice president of marketing. “By working together with Linear Technology, we were able to demonstrate how this interface dovetails perfectly with the integrated, high-speed SERDES channels offered on the LatticeECP2M family of FPGAs. As a result, designers realize a lower cost, lower power and smaller footprint solution for the interface between data converters and FPGA devices. This is particularly important for cost sensitive, high volume applications like wireless base stations, which can benefit from the low pin count and high bandwidth that JESD204 brings to the ADC landscape.”

With devices starting at a price of less than $10.00 in high volume, LatticeECP2M FPGAs provide the lowest cost SERDES-capable FPGAs available, and provide uniquely cost-effective solutions for designs using JESD204/high- speed ADC devices.

Lattice offers a development board that enables customers to quickly develop a JESD204 receiver using the LatticeECP2M SERDES block. The incoming data can then be processed using the LatticeECP2M fabric and high-speed sysDSP(tm) blocks.

A reference design can also be provided to allow interoperation with the LTC2274.

About the LatticeECP2M FPGA Family
The LatticeECP2M FPGA family has redefined the low cost FPGA product category by providing performance-enhancing features that are typically available only on more expensive competitive high-end FPGAs. The LatticeECP2M family supports logic densities from 20K LUTs up to 100K LUTs, has high performance DSP blocks, supports DDR2 memory interfaces at 533Mbps and up to 840Mbps generic LVDS performance. Some of the high-end features incorporated into the LatticeECP2M family include embedded SERDES I/O and the most on-chip memory in its class. The LatticeECP2M family supports up to 16 channels of embedded SERDES, operating up to 3.125Gbps, supporting protocols such as PCI Express, Ethernet (1GbE and SGMII), CPRI/OBSAI, SMPTE and JESD204. In addition to embedded SERDES channels, the LatticeECP2M FPGA family offers Embedded Block RAM capacity ranging from 1.2 Mbits to 5.3 Mbits, representing up to a 400% increase over competitive low-cost architectures.

About Lattice Semiconductor
Lattice Semiconductor Corporation provides the industry’s broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays (FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products.
Lattice continues to deliver “More of the Best” to its customers with comprehensive solutions for system design, including an unequaled portfolio of high-performance, non-volatile and low-cost FPGAs. Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets.

Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeECP2M, sysDSP and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.