Sequence Design Hosts Ultra-Low Leakage Tutorial

Posted by EDA Geek News Staff in Events, Training on Tuesday, March 4, 2008

Sequence Design will hold a tutorial at DATE 2008. Jerry Frenkil, Sequence Design CTO; Ken Choi, Illinois Institute of Technology; and Kimiyoshi Usami, Shibaura Institute of Technology will be the speakers for the tutorial, entitled, “Power Gating for Ultra-Low Leakage: Physics, Design, and Analysis.”

The demand for portable electronic devices continues to grow rapidly and has generated great interest in low-power design, which initially focused on controlling dynamic power consumption. However, the combination of wireless device operational characteristics and exponentially increasing leakage power in new processes motivated the development of leakage reduction techniques. Power gating has emerged as the most effective design technique for achieving ultra-low leakage power. This tutorial will provide detailed descriptions of the physics, motivations, benefits, challenges, techniques, methods, and tradeoffs associated with the design of power gated circuits.

Power Gating for Ultra-Low Leakage: Physics, Design, and Analysis DATE Tutorial
Monday, March 10, 09:30am
Room E-1, ICM, DATE 2008 Conference, Munich, Germany
Jerry Frenkil, Sequence Design CTO; Ken Choi, Illinois Institute of Technology; Kimiyoshi Usami, Shibaura Institute of Technology

About Sequence Design
Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence Design-For-Power solutions give customers the competitive advantage necessary to excel in aggressive technology markets.

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