DATE '08 Conference and Exhibition

The 11th edition of the DATE exhibition will take place alongside the DATE conference at the ICM in Munich from the 11th to the 13th of March. The DATE ’08 conference and exhibition has taken special care this year to focus on content by offering key elements of its educational conference program to the industry visitors of the exhibition.

Exhibition Theatre Programme
Attendees will profit from having an industry forum in the midst of Europe’s largest electronic system design event. The theatre is located on the show floor to thus afford easy access for conference delegates during the morning, lunchtime and afternoon exhibition breaks. Expert panels of users, vendors and analysts will discuss industrial and business topics. Engineering managers from leading electronics manufacturers will relate their own first-hand design experiences of commercial design tools. The programme will focus on business and industry, providing managers and designers with valuable information in the fields of semiconductor and system design and has been designed to be attractive and informative for all attendees with many lively and controversial discussions to look forward to.

The Exhibition Theatre is free of charge to all attendees and will include the following sessions:

Tuesday, 11th March, 2008

SPECIAL OPENING DAY EVENT in the DATE’08 Exhibition Theatre
18h00 Exhibition Welcome Address
Wally Rhines , CEO, Mentor Graphics

Plus Exhibition Drinks Reception, sponsored by the EDA Consortium.


“The Schedule Predictability Crisis – Can it be solved?
Moderator: Prof. Dr.-Ing. Juergen Becker, Universität Karlsruhe,DE
S. Carlson, VP Marketing, Cadence Design Systems, USA
U. Hummel, Director CAD/CAE, Micronas, DE
F. Remond, Design Methodology Director, STMicroelectronics, FR
G. Gupta, Director of Multimedia Subsystems, ARC International,UK
J. Krücken, Design Manager, Freescale Semiconductor, DE

“ESL solutions for power prediction in wireless”
Moderator: P. Wintermayr, Chief Editor,, DE
G. Kaiser, Co-Founder & CEO, Docea Power, F
K. Kronlöf, Principal Scientist, Nokia Research Center, FIN
V. Perrier, Co-Founder and Director, CoFluent Design, FR
R. Scales, Manager Power Architecture & Estimation, Texas Instruments. FR
F. Theeuwen, Head, System Design Methods, NXP Semiconductors, NL
R. Zafalon, Technology Program Manager, STMicroelectronics, IT
T. F. Blaesi, President and CEO, ChipVision Design Systems, DE

“Formal Methods to Verify Analog Circuit Design – Key or Phantasm?”
Moderator: G. Gielen, Professor, KU Leuven, BE
H. Gräb, Academic Director, TU Munich, DE
W. Hartong, Core Comp Technical Leader, Cadence Design Systems, DE
P. Rotter, Engineer, Design Flow Management, Infineon Technologies, DE
F. Schenkel, VP Research & Development, MunEDA, DE

Wednesday, 12th March, 2008


“Functional design is all that matters?”
Moderator: Dr. E. Schubert, Managing Director, ESIC, DE
Dr. A. Sangiovanni-Vincentelli, Chair of Electrical Engineering, Berkeley, USA
Dr. A. Jerraya, Head of Design Programs, CEA, F
Dr. J. Stahl, VP Marketing and Business Development, CoWare, USA
P. Urard, Manager High-Level Synthesis Group, STMicroelectronics, FR
Dr. A. Kim, VP of Telecommunication R&D, Samsung Electronics, Korea
J. Tung, MathWorks Fellow, The MathWorks, USA

“Concurrency in a Multi Processor World”
Moderator: G. Smith, Gary Smith EDA, USA
S. Davidmann, CEO, Imperas, USA
R. Lauwereins, VP of Design Technology, IMEC, BE
G. Martin, Chief Scientist, Tensilica, USA
M. Paganini, MMC, Core Development & Integration, STMicroelectronics, IT
C. Engblom, Dtor., Common Technologies, GF Technology, Ericsson, SE

“Physical Design: A Train Wreck Around the Bend–Do P&R Tools Need a New Architecture to Handle 45nm?”
S. Jilla, Director of Marketing, P&R Division, Mentor Graphics, USA
F. Remond, CAD & Design Methodology Director, STMicroelectronics, FR
G. Curren, CEO, Sondrel, UK
G. Smith, President, Gary Smith EDA, USA
M. Voigt, General Manager Europe, Electronics Engineering Group, NEC, DE

“Virtual Platforms: ESL Hype or Killer App?”
Prof. W. Rosenstiel, Chairman, edacentrum, University of Tuebingen, DE
J. Kunkel, VP and General Manager, Solutions Group, Synopsys, USA
Andreas Hoffmann, VP Engineering, SystemC Tools, Coware, DE
L. Burgun, President and CEO, EVE, FR
John Cornish, General Manager, System Design Division, ARM, UK
James Aldis, System Architect, OMAP, Texas Instruments, FR

Thursday, 13th March, 2008


“DATE 2011, After the Gold Rush: Technology on the Run in the 21st Century
Moderator: C. Edwards, Editor, The IET, UK
L. Baldi, Technology Program Director, Numonyx, IT
A. Cremonesi, Group VP, STMicroelectronics, IT
Dr. Rob Aitken, Fellow, ARM, USA
A. Domic, Sr. VP, Synopsys, USA
L. Lanza, Lanza TechVentures, USA

“System level Design Issues & Advanced Verification Strategies for Power-Cycled SoCs”
Moderator: Prof. Wolfgang Nebel, Chairman, OFFIS, Germany
J. Decker, Solutions Architect, Cadence Design Systems, USA
S. Bailey, Product Marketing Manager, Mentor Graphics, USA
B. Ramanadin, Design Manager, STMicroelectronics, F
C. Holehouse, Chief Engineer, ARC, UK
F. Berntsen, Chief Scientist, Nordic Semiconductor, N
A. Rachevsky, Verification Architect, Marvell, IL

In addition to the Exhibition Theatre the DATE 08 Conference also offers free admission to all visitors to the conference’s Keynote sessions.

Keynote Sessions

“Designing Micro/Nano systems for a safer and healthier tomorrow”
Prof. Giovanni De Micheli, Director, Institute of Electrical Engineering and Integrated Systems Centre, EPFL, CH

“Perspective on embedded systems, the challenges, solutions and research priorities”
Dominique Vernay, CTO, THALES, FR

“Model-Based-Design is nice, but …”
Dr.-Ing. Herbert Hanselmann, President & CEO, dSPACE, DE

“Reliable Services in an Imperfect World”
Prof. Hermann Kopetz, TU Vienna, AT

ICM, Munich, Germany
10 – 14 March, 2008