Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, and Accent S.A., a leading SoC (System on Chip) silicon solution provider, announced that Accent has successfully taped out a low-power RFID application design using the Common Power Format (CPF)-based Cadence® Low-Power Solution. The complex power strategy was captured in CPF, which was used both in the front-end and back-end implementation. The use of CPF allowed Accent to preserve power intent throughout the design flow, cut down costly iteration between front-end design and implementation, and assist in unambiguously implementing the design.
“We are delighted to work with Cadence to enable first-time-right silicon solutions for our customers. We would not have achieved on-schedule tapeout of this complex low-power chip without using CPF and the CPF-based Low-Power Solution from Cadence,” said Federico Arcelli, CEO of Accent. “Our customer handed-off CPF for the design along with the RTL after verification. We could do the complete implementation of the design without ever going back to the customer for any clarification.”
The chip employed ARM libraries and was produced at Chartered Semiconductor. It featured more than 10 power domains for aggressive power reduction. This power intent was captured using CPF, which was used as a hand-off to the implementation. Using the Cadence Low-Power Solution, Accent was able to tape out the customer’s design using the same power-intent file. This allowed Accent to avoid costly iteration in understanding the power intent and avoid errors in the implementation phase, which was key to the quick and successful completion of the design.
“The industry-wide collaborative efforts to automate advanced low-power designs with the Common Power Format have resulted in silicon successes around the world. This tapeout is yet another successful example of the effectiveness of the CPF-based Low-Power Solution,” said Dr. Chi-Ping Hsu, corporate vice president, Power Forward and general manager of IC Digital at Cadence. “Customers like Accent are seeing huge productivity benefits and reduced risks with aggressive power strategies using a CPF-based flow.”
The Cadence Low-Power Solution is the industry’s first complete flow, which integrates logic design, verification, and implementation technologies with the Common Power Format. Available now, it is already proven on multiple tapeouts and multiple applications. Designers have realized a 2 times productivity increase with an average of 40 percent power savings using this flow.
Founded in 1993, Accent is a leading Design Foundry providing design and turnkey services for highly integrated SoC silicon solutions. Accent works closely with IDMs, OEMs and fabless companies enabling differentiation and innovation by designing and manufacturing leading-edge digital, mixed-signal and RF (Radio Frequency) SoCs from specification to mass production. Accent has an unrivalled track record of more than 300 ICs (Integrated Circuit) designs completed to date, with over 98% first-time-right production silicon, and over 180 ICs shipping to market in volumes. Accent has design centers in Milan and Genoa, Italy and sales offices and representatives in Italy, France, Germany, UK, Israel and USA.
Cadence enables global electronic-design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence® software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2007 revenues of approximately $1.6 billion, and has approximately 5,300 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
Cadence is a registered trademark and the Cadence logo is a trademark of Cadence Design Systems, Inc.