Global Semiconductor Alliance Rolls Out IPecosystem Tool Suite 4.0

Global Semiconductor Alliance (GSA) announces the release of its IPecosystem (IPe) Tool Suite Version 4.0 that addresses the risk factors and risk assessments of intellectual property (IP) integration. The update to the IPe Tool Suite will be introduced during the tutorial session, “Tools for Reducing the Hidden Costs in the IP Supply Ecosystem,” at DesignCon 2008, February 4 in Santa Clara, Calif. Version 4.0 includes the Hard IP Licensing Risk Assessment Tool, in addition to the Hard IP Quality Risk Assessment Tool previously released.

The IPe Tool Suite enables more efficient communication between IP vendors, integrators and foundries for IP interaction. The Tool Suite creates efficiencies and lowers risk by reducing the time spent collecting and communicating the information required to purchase, integrate and utilize IP.

The Licensing Tool is the second Tool within the Suite. It focuses on assessing the licensing risk an integrator is willing to accept before making a determination regarding the acquisition of the desired IP. The Tool provides a set of questions determining best practices for semiconductor companies, regardless of expertise in the licensing process.

The Licensing Tool functions similarly to the Hard IP Quality Risk Assessment Tool, by providing a benchmark set of questions that cover the major areas of IP licensing and acquisition, including scope of license, payment, warranty, limitation of liability, indemnity, governing law, confidentiality, term and termination.

“The licensing process can take up to 22 weeks or more,” said Lisa Tafoya, vice president of Global Research at GSA. “This new GSA tool provides an objective measure that enables the negotiation process to focus on the areas that really matter, which will accelerate the process of purchasing IP from a vendor, aid in improving the communication process and lower overall costs for IP integrators and vendors.”

Key benefits include:

  • Shortening the licensing time period by creating more efficient communication and fact finding for IP purchasers
  • Allowing integrators to identify risk factors in a systematic approach
  • Determining the level of risk that is acceptable for each individual integrator
  • Providing a qualitative, yet effective, method for risk assessment

The tutorial session, “Tools for Reducing the Hidden Costs in the IP Supply Ecosystem” hosted by GSA and panel on February 4 will address:

  • The IPecosystem Today – Moderator: Dr. Raminderpal Singh, senior technical staff member, IBM IPecosystem technical lead, GSA
  • Case studies using two common types of IP with the GSA Hard IP Quality Risk Assessment Tool – addresses two types of IP, providing insights on how to use the tool, questions to answer, demonstrate what the tool answers, what the data shows and how to make decisions on quality and licensing risks, and applicability to chip integrators / IP vendors / foundries – David Schwan, engineering manager, CAD and Layout, RF Micro Devices (RFMD)
  • How these risk assessment tools are used in a collaborative “partner-driven” environment – Walter Ng, VP of design enablement alliances, design services division, Chartered Semiconductor Manufacturing Inc.
  • Emerging trends in IP and how the ecosystem is working to aggregate and disseminate data to add value to chip integrators – Adam Traidman, president and CEO, Chip Estimate Corporation
  • Open Forum Discussion on Technology and Manufacturing Tools Needed Within the Industry

The IPecosystem Licensing Tool Version 4.0 is available complimentary to the industry.

Additional areas planned for inclusion in the Tool Suite in 2008 include IP Technology and IP Manufacturability.

About GSA
The Global Semiconductor Alliance (GSA) mission is to accelerate the growth and increase the return on invested capital of the global semiconductor industry by fostering a more effective fabless ecosystem through collaboration, integration and innovation. It addresses the challenges within the supply chain including IP, EDA/design, wafer manufacturing, test and packaging to enable industry-wide solutions. Providing a platform for meaningful global collaboration, the Alliance identifies and articulates market opportunities, encourages and supports entrepreneurship, and provides members with comprehensive and unique market intelligence. Members include companies throughout the supply chain representing 25 countries across the globe.