Ponte Solutions(tm), the bridge between design and manufacturing, announced an enhanced YA System(tm), version 0801, offering new defect analysis capabilities and enhanced features. This new YA release can now analyze butted contacts, diffusion contact to gate shorts, source-drain shorts, and isolated contacts and vias. In addition, Ponte has enhanced the ease of use for its embedded memory analysis capabilities.
New YA System Features
By applying the YA System’s “what-if” capabilities designers can instantly compare the sensitivity of their design, and each major design block, to changes in the defect rates for different DFM mechanisms. Moreover, by providing a quantitative Yield Sensitivity Index (YSI) to different design cockpits, from layout editors to place & route suites, the YA system lets design teams quickly determine the correct layout solution to use.
The new release further enhances the value of Ponte’s YA System at the full-chip level by providing systematic failure analysis in addition to the prior random defect analysis capabilities. Full-chip analysis also allows trade-off scenarios between different memory redundancy schemes for all the different memory types used in an SoC, a capability unique to the YA System. When designers couple the memory analysis with the “what-if” capability, they can optimize memory redundancy schemes considering different defect projections.
The 0801 version of the YA System is in beta evaluations at key customers. It will be available to the general market in February 2008. For additional information please contact Ponte Solutions at (650) 559-9001 or email@example.com
About Ponte Solutions
Ponte Solutions, Inc. develops and markets unique model-based software products and design for manufacturing (DFM) solutions that analyze, predict, and reduce the impact of process variability during the manufacture and design of semiconductors.