UMC (NYSE:UMC)(TSE:2303), a leading global semiconductor foundry, announced the release of its comprehensive all-in-one 65nm design for manufacturing (DFM) support package. The new DFM Design Enablement Kit (DEK) encompasses all the models required by qualified model-based DFM tools that support UMC’s 65nm process technology. The company collaborated with leading EDA vendors to develop the DEK in order to provide an easy to use DFM solution for its 65nm customers.
“It is well known that IC designs produced at the 65nm node and below face multiple production challenges such as increasing process variations and rapidly diminishing printability, which often lead to undesirable manufacturing yields and unacceptable performance variations,” said Patrick T. Lin, head of worldwide IP development and design support at UMC. “To help designers offset their 65nm production challenges, UMC has been closely collaborating with the industry’s leading EDA vendors to successfully deliver optimal DFM solutions.”
UMC’s DEK package consists of 65nm DFM solutions in three main areas:
- Critical Area Analysis (CAA): users can perform critical area optimization such as wire spreading and widening with encrypted defect density data to improve Defect-Limited Yield (DLY).
- Chemical Mechanical Polishing (CMP): with CMP thickness analysis, CMP simulation based on the advanced CMP model determines thickness variation and compensates with timing driven metal fill.
- Lithography Simulation Check (LSC): the tool analyzes impact from different layout practices and identifies potential lithography hotspots using lithography simulation tools with the encrypted technology data.
Based on robust and silicon-validated models, the DEK offers comprehensive support for leading DFM tools, both in platform-based solutions and in alternative design flows by mixing and matching EDA tools from different vendors. The package includes a user friendly graphical user interface (GUI) for easy setup of a DFM design database, completed with application notes and qualification reports for design reference. The application note demonstrates how the tools can be deployed in various design flows. The qualification report shows the accuracy and effectiveness by comparing the tool’s prediction correlated with proven silicon data.
“The DEK is the newest addition to our comprehensive DFM support for leading edge process technology. It’s a testimony to our commitment to deliver our customers the foundry industry’s most comprehensive and user friendly DFM solutions,” said Garry Shyu, director of design tool & DFM support, system & architecture support at UMC.
The DEK package from UMC currently supports leading EDA tools from Cadence Design Systems, Magma Design Automation, Mentor Graphics, Nannor Technologies, Ponte Solutions, and Synopsys. It is immediately available upon request through UMC’s customer service or design support departments.
UMC (NYSE:UMC)(TSE:2303) is a leading global semiconductor foundry that manufactures advanced system-on-chip (SoC) designs for applications spanning every major sector of the IC industry. UMC’s SoC Solution Foundry strategy is based on the strength of the company’s advanced technologies, which include production proven 90nm, 65nm, mixed signal/RFCMOS, and a wide range of specialty technologies. Production is supported through 10 wafer manufacturing facilities that include two advanced 300mm fabs; Fab 12A in Taiwan and Singapore-based Fab 12i are both in volume production for a variety of customer products. The company employs approximately 13,000 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States.