Exsilicon Unveils PCI Express Endpoint Design IP Core

Posted by EDA Geek News Staff in IP Cores on Friday, November 30, 2007

Exsilicon Technologies Pvt. Ltd, a global semiconductor company for design of IP core, announced the introduction of PCI express endpoint design IP Core for fast bandwidth applications. The design is based on PCIe 2.0 specifications and is suitable for high speed advanced systems due to its 32 bit and 8 channel architecture. The interfaces of the core are made flexible to configure and support any type of applications available in the present market. Advanced error reporting is available to improve the hit ratio for malformed TLP and for effective functioning of the core.

The PC's next-generation internal peripheral bus has been quietly overturning both the PC and the embedded-computing industries with its performance and expansion potential. Utilizing fixed cores based on FPGA platform can increase the complexity and functionality of the entire module. Exsilicon IP core is flexible and reliable enough to touch any applications. Application up-gradation will not effect the functionality of the core since the State machines and configurations have inbuilt registers to support any variations for the future.

About Exsilicon
Exsilicon is committed to excellence for its people, clients and partners and is dedicated in turning imaginative ideas into leading products and services in today's dynamic business environment. Exsilicon leverages industry-leading expertise through our Centers of Excellence (CoE) to deploy robust solutions that address our client's most critical business objectives. Managed by senior enterprise architects, each CoE focuses to develop a knowledge shop to support product and solutions delivery with utmost quality.

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