CoWare®, Inc., and Tensilica®, Inc., announced the integration of Tensilica’s Diamond Standard 106Micro, the smallest licensable 32-bit processor core, with CoWare Platform Architect. The integration provides designers with the first and most productive ESL 2.0 solution for platform architecture design, platform verification, and software development using Tensilica’s processor core with the smallest area, lowest power, and highest performance on the market.
This new integration extends the unique relationship between CoWare and Tensilica to the entire Diamond Standard and Xtensa® configurable processor product lines. Tensilica’s processors are already being used extensively by designers with CoWare Platform Architect to perform architecture performance analysis for critical design considerations such as, software execution, memory architecture, and bus occupancy, resulting in the design of better products — faster.
“Our mutual customers have discovered the productivity increase available with CoWare’s powerful tools and their support for ESL 2.0,” stated Steve Roddy, Tensilica’s vice president of marketing. “By working together with CoWare, we’ve been able to help our customers significantly accelerate their SoC platform design cycles.”
“By supporting such a small, low-power, efficient processor, we’re providing our customers with yet another industry-leading processing option in their designs,” stated Tom De Schutter, marketing manager, IP and third-party relationships, CoWare. “A number of very large systems-level companies are using CoWare’s ESL 2.0 solutions with Tensilica’s cores.”
The Diamond Standard 106Micro core measures less than 0.1 mm2 in 65-nanometer GP process technology while using just 0.029 mW/MHz of power. It can achieve up to 300 MHz in an area-optimized 65-nanometer GP design or 620 MHz in a speed-optimized 65-nanometer GP design. This gives it a remarkable 750 Dhrystone MIPS of performance in a very small area. The Diamond Standard 106Micro is particularly attractive to designers upgrading from 8- and 16-bit controllers to a 32-bit processor for extra performance and C-level programming flexibility, as well as designers needing a small, efficient system or subsystem-level controller for applications ranging from peripheral and interface design to networking, automotive, industrial control, and consumer devices such as toys, games and entertainment devices.
CoWare Platform Architect is the market-leading tool for platform architecture design, platform verification, and software development. For platform-driven ESL design, CoWare Platform Architect is the industry’s most productive SystemC-based graphical environment for capturing the entire product platform and the dash-board for initiating the platform analysis functions. Using CoWare Platform Architect, developers minimize development risks, accelerate development cycle, and improve product performance, which leads to delivering better products faster.
Tensilica’s Diamond Standard 106Micro is shipping with CoWare’s ESL 2.0 technology release.
CoWare is the leading global supplier of platform-driven electronic system-level (ESL) design software and services. IP, semiconductor, and electronics companies use CoWare ESL 2.0 solutions to design better processor- and software-intensive products–faster. CoWare solutions solve the new design challenges associated with platform architecture design, platform verification, application sub-system design, processor design, DSP algorithm design, and software development, and are based on open industry standards including SystemC. These solutions also enable IP and semiconductor companies to implement more effective go-to-market strategies. CoWare’s corporate investors include ARM [(LSE: ARM); (NASDAQ: ARMHY)], Cadence Design Systems (NASDAQ: CDNS), STMicroelectronics (NYSE: STM), and Sony Corporation (NYSE: SNE). CoWare is headquartered in San Jose, Calif., and has offices around the world.
Tensilica offers the broadest line of controller, CPU and specialty audio and video DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. Tensilica’s low-power, benchmark-proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking, and telecommunications markets. All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support.
Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. CoWare is a registered trademark of CoWare, Inc.