SyntheSys Research, Inc., introduces the new PCIe Test Bench by BERTScope, the first complete solution for PCI Express® transmitter and receiver physical layer compliance testing at 2.5 and 5.0 GT/s rates. Conventional approaches use multiple instruments to cover compliance which are expensive, physically large and complex to configure. This also impacts the repeatability of results and the knowledge level required of the engineer performing the measurements. The PCIe Test Bench provides all equipment and accessories needed to make compliance measurements easy.
Built on the innovative BERTScope S signal integrity analyzer platform, new capabilities have been added for 5 GT/s compliance: All jitter elements are built in for receiver test making mandatory receiver tolerance testing simple. This includes the new requirement for low and high band random jitter (RJ) as well as the residual spread spectrum clocking signal, represented by a sinusoidal tone. For transmitter compliance, measurements such as jitter and de-emphasis ratio are built in and fast. Building on the capabilities of the new PCIe model BERTScope, the Test Bench also includes the BERTScope CRj clock recovery with jitter spectrum analysis. The included CRj option for transmitter PLL compliance measurement rounds out a comprehensive contribution for PCI Express testing.
Aimed at design and test engineers who work with chips and add-in cards, the PCIE Test bench includes the following items:
- PCIe Signal Integrity Analyzer by BERTScope with new stressed eye elements – the basis for transmitter and receiver compliance testing at 2.5 and 5.0 GT/s, available with bit rate coverage up to 7.5 Gb/s or optionally 12.5 Gb/s. Includes the ability to generate spread spectrum clocks.
- BERTScope CRj with PCIe PLL analysis capability – providing flexible clock recovery, innovative jitter spectrum measurement to 90 MHz for transmitter jitter, and complete transmitter PLL analysis.
- Compliance Channel – conforming to the PCIe requirements for 5:1 voltage ratio as well as the important 20 dB return loss specification, this is a critical element in the 5 GT/s receiver tolerance test.
- PCIe Compliance Baseboard (CBB) version 2, pre-configured for external reference clock use. Used for transmitter and receiver testing at 2.5 and 5.0 GT/s.
- PCIe 2.5 GT/s transmitter compliance test software, providing automated measurements.
- All cables and adapters for a complete test setup.
In addition, the PCIe Test Bench has powerful analysis capabilities going beyond compliance, allowing fast characterization of margin and easy troubleshooting. Examples include the ability to generate spread spectrum clocking (SSC) to test device performance in real world conditions, and also a unique SSC waveform analysis feature that gives insight into a common area for BER issues.
The PCIe Test Bench is available 10 weeks ARO. Upgrade options are available for existing BERTScope customers.
About SyntheSys Research, Inc.
Founded in 1989, SyntheSys Research, Inc., innovator of the award-winning BERTScope(TM), is a privately held corporation located in Menlo Park, California. SyntheSys develops and manufactures high-speed signal integrity test and measurement instrumentation for the computer, storage and communications industries.