Student teams use $100,000 of software and hardware donated by Altera and ImpulseC to create high performance computer designs in an IEEE contest. In addition to the Innovate Canada contest, the Ottawa section of the IEEE (Institute of Electrical and Electronics Engineers) still has openings at the 16 – 17 October workshop in Ottawa – “Accelerating Computationally Intensive Algorithms.”
Open to undergraduate and graduate students, the workshop focuses on the cutting edge of computer design where engineers are creating breakthrough speed capacity through combined hardware and software design and increased parallelism. The workshop is also the start of a Canada-wide competition where teams will design accelerated computer applications in competition for publication and thousands of dollars of prizes. Over (Can) $100,000 of tools have been donated for teams to use.
The workshop focuses on a class of processors called Field Programmable Gate Arrays (FGPA) which has grown enough that it is threatening to re-level the playing field of super computing. FPGAs are essentially entire systems on a chip that can be optimized for specific types of math and throughput (e.g. Google type throughput, International Banking type mathematical computations and advanced radar systems). The building block integrated circuits are FPGAs; devices as inexpensive as CAN $10.00, which are “programmable” such that they can provide multiple cores or streams of logic, all running in parallel. Parallel processing enables these devices to outperform traditional processors at lower power for significant types of computational challenges including video processing, signal processing, computational finance, scientific computing and many military applications.
The competition has been conducted in Europe and Japan. This is the first time in Canada. The competition provides engineering teams with an FPGA based development board from Altera, and the latest in C software from Impulse. This enables teams to use their best ANSI C concepts and move them to parallel processing in FPGA for acceleration. Thousands of dollars of prizes will be awarded and all functional designs will get published.
Alfredo Herrera, Senior Member, Vice-Chair EMS-Ottawa and a designer at Nortel is the volunteer session organizer and has a long history of supporting Canadian engineering excellence.
Students can sign up online