EVE, the leader in hardware/software co-verification, announced that it will host a series of seminars to address the “Billion-Cycle Challenge,” or when a design team can no longer manage a billion cycles with ordinary simulation. Each seminar, which run from 9 a.m.–noon, will demonstrate a different kind of approach through the use a proven verification methodology known as hardware-assisted verification.
Dates and locations in the United States and Canada include:
- October 9 and October 31 in Santa Clara, Calif.
- October 11 in Irvine, Calif.
- October 16 in Boston
- October 17 in Ottawa, Ontario, Canada
- October 18 in Austin, Texas
- October 30 in San Diego, Calif.
The series moves to Asia during the month of November and will head to Europe in February. Detailed dates and locations will be announced soon.
Registration is free of charge to qualified professionals who are directly involved with and/or manage chip verification.
EVE is the worldwide leader in hardware/software co-verification solutions, including hardware description language (HDL) acceleration and extremely fast emulation. EVE products significantly shorten the overall verification cycle of complex integrated circuits and electronic systems designs. Its products also work in conjunction with popular Verilog, SystemVerilog, and VHDL-based software simulators from Synopsys, Cadence Design Systems and Mentor Graphics. Its United States headquarters are in Santa Clara, Calif. Telephone: (408) 855-3200. Facsimile: (408) 845-9209. Corporate headquarters are in Palaiseau, France. Telephone: (33) 1 126.96.36.199. Fax: (33) 1 188.8.131.52. Email: firstname.lastname@example.org.
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