Silicon Integration Initiative (Si2) announced the formation of the Design-For-Manufacturability Coalition (DFMC) which will build on previous efforts to ensure that ICs can be manufactured in accordance with the original design. Founding members include Cadence, Freescale Semiconductor, IBM, Ponte Solutions, Samsung, Sagantec, ST Microelectronics, and Texas Instruments. Other members are expected to be announced soon.
Important technology contributions to the DFMC were made yesterday by Ponte Solutions and Blaze DFM. Ponte’s model-based yield analysis technology allows yield sensitivity analysis for identifying critical areas. Blaze DFM’s contribution consists of a proposed standard for the interactions between IC design tools and lithography simulation engines.
As semiconductor features shrink in size and pitch, the challenge of manufacturing them at acceptable yields increases dramatically. New materials, new processes, new equipment are being employed to challenge the laws of physics and are pushing the limits of known manufacturing science. More and more, manufacturing cycles and yield must be considered as an integral part of design of the library elements and the IC as a whole. IC production must become a collaborative effort across the disaggregated supply chain where business partners can share knowledge in a trusted environment – an integrated enterprise. The DFMC was formed to address these issues.
“Today, DFM is where Signal Integrity was 5 years ago,” says Jake Buurma, Si2′s vice president of West Coast Operations. “Now SI is an integral part of the design flow and you can predict when you’ll have crosstalk convergence. But you can’t do that with DFM. If you have a DFM problem there is no easy way to converge so you miss the tapeout date and everyone loses. The biggest losers are the End User and the Silicon Foundry since the product will be late or be slower, or take more power, or have lower yield.”
“Design for manufacturability by its very nature is a broad interdisciplinary science involving many aspects of chip design and manufacturing,” says Lars Liebmann, Distinguished Engineer, IBM Semiconductor Research and Development Center. “Defining precise terminology and open interface standards is vital to exploiting the technical achievements made in DFM to date. IBM is looking to the DFMC to architect the infrastructure necessary to help us and our partners leverage DFM’s full potential.”
“DFM parameters have to be added to existing design flow and the approach has to be consistent and holistic,” says Steve Schulz, president and CEO of Si2. “A good example is Design Intent where information about the Design is tagged on to Libraries, Designs, Cells, Polygons and Nets and then carried all the way to final IC production and testing. The DFMC will create a standard semantic and syntax for these DFM parameters. This is the basis for a common language around DFM parameters that design automation tools and people can use for transactions. Anticipated DFMC deliverables such as the DFM Dictionary and DFM API should become a simple, common language used to conduct DFM transactions between tools with different native languages.”
Si2 is an organization of industry-leading semiconductor, systems, EDA and manufacturing companies focused on improving the way integrated circuits are designed and manufactured in order to speed time-to-market, reduce costs, and meet the challenges of sub-micron design. Si2 is uniquely positioned to enable collaboration through a strong implementation focus driven by its member companies. Si2 focuses on developing practical technology solutions to industry challenges. Si2 represents over 100 companies involved in all parts of the silicon supply chain throughout the world.