Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, announced record attendance and a record number of technical presentations at its CDNLive! Silicon Valley Conference for semiconductor and electronics systems designers. Attendance of over 700 registered designers, design managers and executives at the conference, held Sept. 10-12, 2007 at the San Jose McEnery Convention Center, represents an increase of 32 percent over last year and surpasses all previous records. Total attendance, including exhibitors and Cadence engineers, exceeded 1,200 with attendees coming from 16 countries and representing 183 companies.
The backbone of CDNLive! Silicon Valley is the high-quality technical presentations. More than half of the presented papers were delivered by design engineers from Cadence customers, partners and IC manufacturing companies who use Cadence EDA technology to design leading-edge semiconductor products. This year, Cadence received more than 250 abstracts resulting in 66 customer presentations, 27 Cadence presentations and 16 co-authored presentations. Subjects ranged from logic design and custom design to functional verification and design for manufacturing, among others, as attendees shared best practices and methodologies.
“One of the more exciting developments this year was the increase in the number of collaborative papers,” said Michael Catrambone, chairperson of the Cadence Designer Network Steering Committee and Distinguished Engineer at UTStarcom. “The quality of these papers was very high, a direct result of the increase in collaboration and information sharing that takes place at these CDNLive events held around the world.”
Conference participants voted for the best user-authored technical paper/presentation in each track. In addition, the CDNLive! Steering Committee selected the paper presented by Kelly Larson, Verification Manager, Analog Devices, Inc., as the best paper of the conference.
The event opened with a keynote presentation by Mike Fister, president and chief executive officer of Cadence, who said that the increasing complexity of semiconductor design means “engineers are faced with a new set of design challenges.”
“It’s a complex maze from concept to manufacturing,” said Fister. “We want customers to know that with Cadence, ‘What you design is what you get.’” He then outlined a broad array of new offerings from Cadence, principally aimed at designers targeting the 65nm and 45nm process nodes, where capabilities such as statistical static timing analysis (SSTA) and design for manufacturing (DFM) are necessary to quickly achieve high-quality, high-yielding designs—”from smart to finish”. The key is to put manufacturing predictability in the hands of the designer.
Alberto Sangiovanni-Vincentelli, Cadence co-founder and board member and the Edgar L. and Harold H. Buttner Chair of electrical engineering and computer sciences at UC Berkeley then spoke on the theme of EDA moving “From Art to Science”, and the need for EDA to move to higher levels of abstraction in the system-level design space.
In his Tuesday keynote, Tom Reeves, vice president of technology licensing for IBM’s Intellectual Property and Standards group, outlined the close, advanced-solutions oriented relationship that Cadence and IBM enjoy, and the role that Cadence has played in providing design solutions and methodologies for IBM chip designs that are now used in a myriad of computing, consumer and communications end products.
CDNLive! Global Events
More than 3,400 Cadence technology users are expected to participate in CDNLive! User Conferences worldwide this year, an increase of 15 percent over last year. The 2007 lineup of CDNLive! User Conferences included events in Munich, Shanghai, and Tokyo and will move on later this year to Bangalore (Oct. 11-12), Tel Aviv (Nov. 5) and Hsin-Chu, Taiwan (Nov. 13).
At these events users learn about the latest insights on complex electronic-design-automation issues, solutions to address the anticipated IC design challenges of tomorrow as well as practical techniques and tips from other power users, domain experts and Cadence technologists to further their design skills. Executives are also able to network with peers, exchange views on the key challenges for the industry, and get a deeper level of understanding of how Cadence can help them to address their long-term business strategies.
“The CDNLive! User Conference is an essential event for all Cadence technology users across design domains. It’s a unique opportunity for sharing knowledge with top designers, executives as well as Cadence developers,” said Craig Johnson, corporate vice president of marketing and strategy at Cadence. “Continued positive feedback from technical attendees and executives is very encouraging and shows us that we are on the right track with our conference concept.”
Cadence enables global electronic-design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence(R) software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2006 revenues of approximately $1.5 billion, and has approximately 5,200 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
Cadence is a registered trademark; the Cadence logo and the CDNLive! logo are trademarks of Cadence Design Systems, Inc in the United States and other countries.