Apache Design Solutions, the technology leader in power signoff and complete silicon integrity platform solutions for system-on-chip (SoC), analog, and system designs, announced that Toshiba has standardized on Apache’s RedHawk for power signoff of their 90 and 65nm designs worldwide. With the advancement of process technologies, Toshiba recognizes that power integrity is a critical requirement to their silicon success. They selected Apache’s RedHawk as their signoff solution based on its continued value over the past three years where RedHawk full-chip dynamic and static IR-drop analysis enabled Toshiba to successfully tapeout many of their ASIC and COT designs.
“Apache’s RedHawk delivers performance, accuracy, and ease-of-use required for identifying and correcting power design issues prior to tapeout,” said Tamotsu Hiwatashi, senior manager of planning department, System LSI Design Department, System LSI Division of Toshiba. “In addition, Apache’s support has been outstanding, not only in their technical expertise, but also in their responsiveness to meet our needs, which has enabled us to increase confidence in the quality of our designs.”
“As designs move towards 65nm and below, more and more companies are requiring power as one of the silicon signoff criteria,” said Dian Yang, general manager and vice president of product management at Apache. “The rapid adoption of RedHawk by leading IDM and fabless companies as their power signoff solution of choice demonstrates that it is meeting the difficult challenges of power and noise analysis and optimization.”
RedHawk is a full-chip Vectorless Dynamic(TM) physical power integrity solution for SoC power closure signoff of 130nm, 90nm, and 65nm designs. Correlated with silicon measurements and SPICE, RedHawk addresses dynamic power issues such as simultaneous switching output (SSO) for core, memory, clock, and I/O, as well as effects of on-chip inductance, package RLC, and decoupling capacitance. RedHawk delivers transistor-level accuracy with cell-based capacity, performance, and ease-of-use.
With RedHawk, designers can identify dynamic “hot spots,” examine the impact on timing, accurately pinpoint the cause of dynamic voltage drop, and automatically repair the source of supply noise. RedHawk enables designers to reach power closure sign-off for high performance SoCs, including those utilizing advanced low-power design techniques such as leakage current control, MTCMOS (power-gating), multiple voltage domains, and multiple threshold transistors.
About Apache Design Solutions
Apache delivers the leading power sign-off solution adopted by 80% of top IDMs, fabless semiconductor companies, and foundries, as well as complete platform solution for silicon integrity of SoC, analog-IP, and system designs. Apache’s innovative platform considers all sources of noise that impacts the design — such as power, signal, package/system I/O, substrate, and temperature — Apache’s silicon integrity platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon/system. Apache’s vendor-neutral solutions enable designers to adopt any industry-standard physical design flow and are in production use by over 40 customers worldwide.
Apache Design Solutions, NSPICE, RedHawk, PsiWinder, Sahara, Sentinel, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.