Apache Design Announces Technology Seminars in Taiwan, Japan

Apache Design Solutions, the leader in power signoff and complete silicon integrity platform solutions for system-on-chip (SoC) designs, announced that the company will be hosting technology seminars in Taiwan and Japan on September 11 and 14, 2007, respectively. The first seminar “Silicon Integrity Signoff for 65/45nm Designs” will be held in Hsinchu, Taiwan focusing on the challenges associated with managing power and noise for SoC, analog, and system (IC-Package-PCB) designs. The second seminar “Design Challenges for 45/32nm” to be held in Yokohama, Japan will bring together industry speakers from STARC, Toshiba and Kobe University to share their views on the upcoming challenges of 45/32nm designs. Dr. Andrew Yang, CEO of Apache Design Solutions will be presenting at both seminars.

Apache Design Solutions, Inc.
Technology Seminars – Silicon Integrity Signoff for 65/45nm
Designs and Design Challenges for 45/32nm Designs

  • Silicon Integrity Signoff for 65/45nm Designs to be held at the Ambassador Hotel, 10th Floor, 188 Chung Hwa Road, Section 2, Hsinchu, Taiwan.
  • Design Challenges for 45/32nm Designs to be held at the Shinyokohama Hotel, South Building, 3-1-18 Shinyokohama Koukoku-ku, Yokohama, Japan.
  • Silicon Integrity Signoff for 65/45nm Designs, September 11, 2007 starting at 9am, Hsinchu, Taiwan.
  • Design Challenges for 45/32nm Designs, September 14, 2007 starting at 12:30pm, Yokohama, Japan.

About Apache Design Solutions
Apache delivers the leading power sign-off solution adopted by 80% of top semiconductor companies and a complete platform solution for silicon integrity of low-power, high-performance system-on-a-chip (SoC) designs. Apache’s innovative platform considers all sources of noise that impacts the design—such as power, signal, package / system IO, substrate, and temperature—Apache’s silicon integrity platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache’s vendor-neutral solution enables designers to adopt any industry-standard physical design flow and is certified by TSMC’s 5.0, 6.0, and 7.0 Reference Flow (NYSE: TSM).