Magma(R) Design Automation Inc. (Nasdaq: LAVA), a supplier of semiconductor design software, announced an enhanced statistical static timing analysis (SSTA) methodology that is tuned to TSMC’s 65-nanometer (nm) process. The methodology is based on Magma’s Quartz(TM) SSTA and expands the capabilities offered in TSMC Reference Flow 7.0. This advanced methodology now supports global (inter-die) and random (intra-cell) process variations, composite current source (CCS) models, statistical leakage analysis and statistical optimization as validated in TSMC Reference Flow 8.0. In addition, TSMC now provides Magma with rules to enable statistical extraction and worst-scenario RC analysis. The two companies have worked together for nearly two years developing and qualifying this methodology. The benefits include reduced risk, improved quality of results (QoR), more robust designs, faster turnaround time and a vastly simplified sign-off flow.
“Magma’s Quartz SSTA is closely coupled with TSMC’s process technology, and provides the accuracy designers need to account for both process and metal variations,” said Kam Kittrell, general manager of Magma’s Design Implementation Business Unit. “In addition, Quartz SSTA is fully integrated into the Magma IC implementation flow, making the physical implementation engines variability-aware. Having this powerful capability built into the flow improves QoR and accelerates and simplifies timing closure and sign-off.”
“Magma’s method of addressing process variation is highly effective for designers working at 65nm and below,” said Kuo Wu, deputy director of design service marketing at TSMC. “Our collaboration with Magma on statistical static timing analysis provides an advanced methodology that is tightly integrated into the design flow.”
About the Statistical Timing Analysis Methodology
Traditional static timing analysis (STA) approaches do not scale to the 65nm node. STA, which relies on brute-force corner and highly guard-banded on-chip variation (OCV) analysis and derives timing based on pessimistic and worst-case gate and interconnect models, is overly conservative and inaccurate. It is also unable to account for process and metal variations, causing designers to sign off on designs that may ultimately fail in silicon. This unreliable approach results in lower performance and longer, more costly design cycles.
Quartz SSTA supplements traditional sign-off methods with powerful and accurate statistical static timing analysis. It uses random variables rather than fixed delays and produces a statistical distribution, rather than best-case and worst-case models. It can account for global and random process variations, worst-scenario metal variations, and automatically identify clocks nets, timing paths, cells, and metal layers that are sensitive to variation. Utilizing the unified data model architecture, Quartz SSTA then works seamlessly in conjunction with Magma’s IC implementation system to automatically fix timing problems that result from variation. With this process-variability-aware IC implementation flow, pessimism is eliminated, predictability is enhanced, and timing closure and sign-off can be achieved faster and easier.
Magma’s software for integrated circuit (IC) design is recognized as embodying the best in semiconductor technology. The world’s top chip companies use Magma’s EDA software to design and verify complex, high-performance ICs for communications, computing, consumer electronics and networking applications, while at the same time reducing design time and costs. Magma provides software for IC implementation, analysis, physical verification, characterization and programmable logic design, and the company’s integrated RTL-to-GDSII design flow enables designers to “Design Ahead of the Curve”(TM). Magma is headquartered in San Jose, Calif. with offices around the world. Magma’s stock trades on Nasdaq under the ticker symbol LAVA.
Magma is a registered trademark and Quartz and “The Fastest Path from RTL to Silicon” are trademarks of Magma Design Automation.