Lattice Semiconductor Corporation (NASDAQ: LSCC) announced that it has validated the operation of the TOPPERS open source implementation of the mITRON 4.0 Real Time Operating System (RTOS) with its LatticeMico32(TM) 32-Bit soft microprocessor. This announcement expands the RTOS options available to users of the LatticeMico32 microprocessor, and is particularly significant because mITRON represents the de facto RTOS for embedded applications designed within Japan.
“We are excited to expand the RTOS support options for our LatticeMico32 soft microprocessor,” said Chris Fanning, corporate vice president, Enterprise Solutions. “Validating support for an open source implementation of mITRON matches well with the open source nature of the LatticeMico32 microprocessor.”
The mITRON RTOS is a derivative of The Real-time Operating system Nucleus (TRON) project begun by Professor Dr. Ken Sakamura of the University of Tokyo. The mITRON derivative focuses on the efficient implementation of a RTOS suitable for implementation in low memory resource embedded applications. Like other TRON derivatives, mITRON does not provide the code for the operating system but instead provides a set of specifications for its implementation. The current version of the specification is 4.0.
About the TOPPERS Project
The Toyohashi Open Platform for Embedded Real-time Systems (TOPPERS) project is a non-profit organization that develops and maintains an open source implementation of the mITRON RTOS specification. Lattice has developed code for areas that are specific to the LatticeMico32 microprocessor and confirmed the successful compilation of these along with the generic portions of the TOPPERS kernel. Successful operation of code within the kernel also has been demonstrated on several LatticeMico32 development systems.
About the LatticeMico32 Soft Microprocessor
The LatticeMico32 product is a soft open source 32-bit RISC microprocessor optimized for Lattice Semiconductor’s latest FPGA products, including the LatticeXP2(TM), LatticeECP2M(TM) and LatticeSC(TM) FPGA families. The open source nature of the product provides a free of charge solution that provides designers with visibility into the code, the flexibility to make changes and the portability to move to other architectures if necessary. The LatticeMico32 System lets designers define graphically the microprocessor and associated peripherals such as memory controllers, Ethernet controllers, DMA engines, general purpose I/O, timers and UARTs interconnected with a WISHBONE bus. The LatticeMico32 System also provides an Integrated Development Environment (IDE) for software coding and debug.
Availability and Pricing
The latest version of the LatticeMico32 System, 7.0, can be downloaded free of charge from the Lattice website. This version of the tools contains the Lattice- specific files and Make scripts necessary to compile the TOPPERS kernel for the LatticeMico32 microprocessor. The TOPPERS kernel can be downloaded from the TOPPERS project web site.
About Lattice Semiconductor
Lattice Semiconductor Corporation provides the industry’s broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays (FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products. Lattice continues to deliver “More of the Best” to its customers with comprehensive solutions for system design, including an unequaled portfolio of high-performance, non-volatile and low-cost FPGAs.Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets.
Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeXP2, LatticeMico32, LatticeECP2M, LatticeSC and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.