Altera Corporation (Nasdaq: ALTR) announced that Tokyo-based NEC System Platforms Research Laboratories has selected Altera’s transceiver-based Stratix(R) II GX FPGAs and Nios(R) II embedded processor for implementing its new high-speed ExpEther interface. ExpEther is a PCI Express (PCIe)-to-Gigabit Ethernet (GbE) interface that makes data transfer on PCIe available via the GbE networking protocol. It extends the internal bus connection to LAN-connected devices and facilitates system expansion, meeting requirements for next-generation networked platforms.
NEC’s goal was to rapidly develop a compact, custom implementation of this high-speed interface applicable across many products, such as communications systems, computers and servers. Using the Stratix II GX FPGA enabled NEC to design the ExpEther interface with a single device. Stratix II GX FPGAs deliver more high-speed transceiver ports, ample logic gates for communications and computer systems, and needed features for control management with implementation of Nios II soft core processors.
“We had many technical challenges to overcome in order to develop our ExpEther interface technology,” said Toshiyuki Kano, general manager of NEC System Platforms Research Laboratories. “Only Stratix II GX FPGAs met our key criteria: abundant logic gates, reliable performance of high-speed transceivers with low power, flexibility and overall high-performance. That is why we selected Stratix II GX FPGAs.”
“NEC’s ExpEther platform demonstrates how leading-edge developers leverage FPGAs to quickly capture design opportunities and extend their value to popular interfaces and protocols in new applications,” said Arun Iyengar, senior director of Altera’s communications business unit. “Altera’s robust offerings for PCI Express, Gigabit Ethernet and other system-building blocks play a crucial role in enabling these types of applications. With the recognized signal integrity, performance leadership and ease-of use of our transceiver-based FPGAs, we deliver complete, high-value solutions to our communications systems customers.”
About Stratix II GX Family
Stratix II GX FPGAs, with embedded transceivers, feature up to 132,000 equivalent logic elements (LEs), giving designers ample logic resources to implement multiple protocols or highly complex intellectual property (IP). This enables designers to address multiple markets and customer requirements cost-effectively with a single device. In addition, up to 20 fully functional multi-gigabit transceivers make it ideal for PCIe bridging and multiple-port line card applications.
See ExpEther Demonstrated
The NEC ExpEther interface was presented at Interop Tokyo 2007 at Makuhari Messe from Wednesday, June 13 through Friday, June 15, 2007. It will also be demonstrated at the HOT CHIPS Symposium on High-Performance Chips from Sunday, August 19 through Tuesday, August 21 at Stanford University, USA.
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