Magma(R) Design Automation Inc. (Nasdaq: LAVA), a provider of semiconductor design software, announced the availability of a statistical static timing analysis (SSTA) methodology based on Magma’s Quartz(TM) SSTA and tuned to UMC’s 90- and 65-nanometer (nm) processes. UMC selected the Magma software because it can effectively address timing and yield problems caused by process variation in 65-nm and below technologies, and because it has passed UMC’s rigorous qualification process.
“As more of our customers migrate to 65 nm, accounting for process variation becomes a bigger concern,” said Ken Liou, director of the IP and Design Support division at UMC. “UMC partnered with Magma to develop the SSTA methodology, which includes statistical library support, extraction for interconnect variation, and statistical analysis, allowing us to offer our customers additional solutions that effectively address timing closure issues in 65-nm and smaller technologies.”
“Static timing analysis (STA) alone can’t properly account for the variability inherent in sub-nanometer semiconductor processes. To compensate, designers use overly conservative timing analysis, which leads to lower quality of results in terms of timing, area and power,” said Kam Kittrell, general manager of Magma’s Design Implementation Business Unit. “With the Magma-UMC SSTA methodology, designers can understand and quantify process variation to improve accuracy, and allow for informed decisions about yield and performance tradeoffs, taking full advantage of the performance gains that UMC’s 90- and 65-nm processes offer.”
About the Statistical Timing Analysis Methodology
Traditional static timing analysis (STA) approaches do not scale to the 65-nm node. STA, which relies on brute-force corner and highly guard-banded on-chip variation (OCV) analysis and derives timing based on pessimistic and worst-case gate and interconnect models, is overly conservative and inaccurate. It is also unable to account for process and metal variations, causing designers to sign off on designs that may ultimately fail in silicon. This unreliable approach results in lower performance and longer, more costly design cycles.
Quartz SSTA supplements traditional sign-off methods with powerful and accurate statistical static timing analysis. It uses random variables rather than fixed delays and produces a statistical distribution, rather than best-case and worst-case models. It can account for global (inter-die) and random (intra-cell) process variations, composite current source (CCS) models, statistical leakage analysis and statistical optimization, automatically identifying clocks, paths, cells and metal layers that are sensitive to variation. Utilizing the unified data model architecture, Quartz SSTA then works seamlessly in conjunction with Magma’s IC implementation system to automatically fix timing problems that result from variation. With this process-variability-aware IC implementation flow, pessimism is eliminated, predictability is enhanced, and timing closure and sign-off can be achieved faster and easier.
Magma’s software for integrated circuit (IC) design is recognized as embodying the best in semiconductor technology, enabling the world’s top chip companies to “Design Ahead of the Curve”(TM). Magma provides EDA software for IC implementation, analysis, physical verification and characterization. Magma products are used by the world’s leading engineers to create complex, high-performance ICs for consumer electronics, mobile communications, computing and networking applications, while at the same time reducing design time and costs. Magma is headquartered in San Jose, Calif., with offices around the world. Magma’s stock trades on Nasdaq under the ticker symbol LAVA.
Magma is a registered trademark and Quartz and “Design Ahead of the Curve” are trademarks of Magma Design Automation.