Brion Technologies, an ASML company, announced the availability of Tachyon(TM) Lithography Aware Design (LAD), an extension of the company’s Tachyon suite for optical proximity correction (OPC) verification and OPC application. Tachyon LAD gives designers of advanced integrated circuits (ICs) the ability to accurately assess how circuit designs will print on silicon under real-world production conditions.
“IC designers know that in the deep submicron era, there are things happening in silicon during the manufacturing phase that are not being accounted for in the design implementation phase,” said Mike Gianfagna, vice president of design business for Brion. “Tachyon LAD can accurately predict what will appear in silicon, illustrating silicon contours and hot spots, and showing designers where and how to correct these problems — all before the first tapeout.”
Tachyon LAD analyzes standard GDSII data and models how the lithography process will reproduce a design on silicon, eliminating the need for EDA vendors to develop new software tools or become experts in the manufacturing process. Tachyon LAD works with existing manufacturing processes and flows, so there is no need to calibrate new models to drive the process.
Tachyon LAD uses the same production-proven lithography analysis capability found in Tachyon Lithography Manufacturability Check (LMC), and the robust, process-calibrated OPC technology found in Tachyon OPC+. Tachyon LAD is based on existing, proven models, allowing for faster startup time and reduced overall cost of ownership when compared with other approaches that require new model development.
Brion is offering Tachyon LAD through its initial EDA partners Cadence Design Systems Inc., Magma Design Automation Inc. and TOOL Corp. Several customers including Japan’s Semiconductor Technology Academic Research Center (STARC) are already working with Tachyon LAD along with these EDA vendors’ respective design tools.
Tachyon LAD will be available for beta testing in July and runs on all Tachyon hardware platforms, including Tachyon 2.0, which is designed for the Lithography-Driven Design & Manufacturing(TM) challenges of the 45nm and 32nm nodes.
Brion will host a lunch event during the 44th Design Automation Conference in San Diego on June 5th to present more about Tachyon LAD and the challenges it addresses. To attend, please contact call +1-408-653-1542.
About Brion Technologies
Brion Technologies is an ASML company and industry leader in computational lithography for integrated circuit Lithography-Driven Design and Manufacturing(TM). Brion’s Tachyon(TM) platform, an optical proximity correction (OPC) and OPC verification system, enables capabilities that address chip design, photomask making and wafer printing for semiconductor manufacturing. Brion is headquartered in Santa Clara, California.
Brion Technologies, the Brion Technologies Logo, Lithography-Driven Design & Manufacturing, and Tachyon are trademarks of Brion Technologies, Inc.