Sierra Design Focuses on 65nm, 45nm Design Challenges at DAC

Sierra Design Automation, Inc., the technology leader in variability-driven IC place & route solutions, announced that the company will be hosting a luncheon panel “65/45nm Design Challenges – A Designer’s Perspective” featuring AMD, STMicroelectronics and Texas Instruments at the Design Automation Conference (DAC) held on June 4 – 8, 2007 in San Diego, California.

Luncheon Panel: “65/45nm Design Challenges – A Designer’s Perspective.” Shankar Krishnamoorthy, Founder, Chief Technical Officer and VP of Engineering at Sierra Design Automation will moderate. This luncheon panel is targeted at the design community to help foster a discussion on 65/45nm design challenges. Design leaders from AMD, STMicroelectronics and Texas Instruments will participate in this panel where they will share their view on 65/45nm roadblocks and solutions.

DAC 2007, San Diego Convention Center, San Diego, Calif., Room 29A. Lunch will be provided. Wednesday, June 6, 2007 at 12:00 PM.

About Sierra Design Automation
Sierra Design Automation is a privately funded EDA company founded in January 2003. The Company’s world-class EDA team is focused on providing semiconductor designers with innovative IC implementation solutions that comprehensively address the performance, capacity, time-to-market, and variability challenges occurring at the 65nm, 45nm, and below process nodes. Olympus-SoC, Sierra’s flagship product, provides the next generation place and route system that concurrently addresses variations in lithography, process corners and design modes. It is built on Sierra Pinnacle, the customer proven and industry leading design for variability physical implementation solution. Technology highlights include lithography driven detailed router, embedded signoff quality timing engine, adaptive variability engine in addition to an open architecture and ultra-compact database that can handle extremely large capacities.