Sequence, Mentor Graphics Team on ESL Power Exploration Flow

Sequence Design, the EDA leader in power-aware SoC design solutions, announced a collaborative effort with Mentor Graphics that has resulted in an integrated electronic system level (ESL) power exploration flow. This project stems from Sequence’s membership in the Mentor Graphics’ OpenDoor(R) partnership program.

With this flow, designers can automatically generate and analyze multiple ESL-based implementations to find the optimum balance of performance, area, and power. The two companies will demonstrate the new design flow featuring Mentor Graphics’ Catapult C Synthesis tool with PowerTheater in the Sequence Design booth (#4860) daily from 4-5pm at the 44th Design Automation Conference, June 4-8 in San Diego, Calif.

“To a large degree, ESL design is driven by the power-sensitive portable electronics market. ESL methodologies move critical design decisions to earlier in the design process, giving designers more freedom to make architectural changes that can have the greatest impact on power consumption,” said Shawn McCloud, high-level synthesis product line director, Mentor Graphics Corporation. “The Mentor/Sequence combination delivers an automated power exploration flow that helps designers reduce power consumption by as much as 30% for their next-generation portable applications.”

The companies have integrated Mentor Graphics’ Catapult(R) C Synthesis with Sequence’s PowerTheater. Catapult C Synthesis generates hardware descriptions from a pure ANSI C++ source, automating the painstaking manual coding process and delivering a 10-100x productivity improvement. This flow leverages Catapult’s SCVerify feature, which links the tool’s SystemC and RTL output to a pure ANSI C++ testbench. Using the SCVerify flow, Catapult generates a dynamic switching activity file that PowerTheater then uses to create accurate dynamic power and static power estimations. The integrated flow enables Catapult C Synthesis and PowerTheater to quickly generate architectures, run power estimates against each architecture, and display power, performance, and area results for each architecture within the Catapult C environment.

“Moving to higher and higher levels of abstraction is the history of the EDA industry,” said Holly Stump, Sequence vice president of marketing. “Sequence is the defacto standard in high-level power estimation, working with ESL synthesis leaders such as Mentor, helps designers rapidly deliver the 3 Ps: power, performance, and price.”

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $800 million and employs approximately 4,250 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.

About Sequence
Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence Design-For-Power solutions give customers the competitive advantage necessary to excel in aggressive technology markets.