Nascentric Announces 5 Patents for IC Simulation, Analysis

Nascentric announced that the U.S. Patent Office has awarded it five patents in the area of Integrated Circuit simulation and analysis. The patents protect the intellectual property contained within its innovative Fast-SPICE simulation and analysis tool, AuSIM(TM).

“We’ve achieved the fastest and most accurate Fast-SPICE simulation and analysis tool on the market, at the core of which is our patented technology,” said John Croix, founder, Chief Technical Officer and a co-inventor of the patents. “This technology enables users to simulate faster without sacrificing accuracy – and to do so on large blocks in excess of tens of millions of transistors.”

“Nascentric has unique technology and an outstanding team that has delivered a critical solution for verifying nanometer designs,” said Rahm Shastry, Nascentric President and CEO. “Growing leakage currents, performance and accuracy needs have mandated a fresh approach to Fast-SPICE technology. Nascentric has staked the absolute leadership in this key technology.”

The five U.S. Patents are:

U.S. Patent 7,065,720, “Apparatus and methods for current-based models for characterization of electronic circuitry,” enables users to obtain greater accuracy during simulation and analysis by using current-based characterization of logic cells.

U.S. Patent 7,013,440, “Apparatus and methods for interconnect characterization in electronic circuitry,” enables users to obtain greater accuracy during simulation and analysis by using current-based interconnect characterization.

U.S. Patent 7,194,716, “Apparatus and methods for cell models for timing and power analysis,” enables users to obtain greater accuracy and performance in power and timing analysis by using current-based timing and power analysis.

U.S. Patent 7,191,414, “Apparatus and methods for interconnect simulation in electronic circuitry using non-uniform time step,” enables users to obtain greater accuracy and performance in simulation and analysis by using non-uniform time steps.

U.S. Patent 7,155,691, “Apparatus and methods for compiled static timing analysis,” enables users to obtain greater performance with less memory during static timing analysis. It also enables the creation of faster, more compact, and reusable static timing analysis models that may be employed in a hierarchical manner.

Nascentric has five additional patents pending, and is planning to file several more in the coming year.

About Nascentric
Nascentric is a privately held company that develops and markets a patented, next-generation Fast-SPICE simulator for analysis and functional verification of complex nanometer designs. Nascentric products allow designers to quickly simulate, analyze and verify larger and more complex circuits, improve design quality, and facilitate higher yields. The Nascentric management team brings decades of combined electrical engineering and electronic design automation experience to bear on the challenge of delivering full-chip simulation and analysis focused on eliminating silicon re-spins due to nanometer effects. For more information call 1-408-834-1300.

Nascentric, the Nascentric logo, and AuSIM are trademarks and registered trademarks of Nascentric, Inc.