ArchPro Introduces MaVeric Multi-Voltage Design Verification

ArchPro Design Automation announced MaVeric for next-generation, multi-voltage design verification. Multi-voltage designs have become the norm in order to control power in SOCs. Use of multi-voltage techniques has increased verification complexity. Power intent based verification solutions lead to inadequate coverage of the power states and can result in silicon failures or failures during field operation. MaVeric eliminates these risks through an innovative architecture-based, multi-voltage profiling and Electrically Accurate verification to completely verify a multi-voltage design.

Built on silicon proven technologies, MaVeric lets designers achieve:

  • Complete Architecture-Based Coverage of multi-voltage states, transitions and sequences
  • Automatic multi-voltage assertion generation to debug designs early and easily
  • Electrically Accurate verification that includes voltage-aware functional specifications for cells and IPs that eliminates any uncertainty regarding design function
  • Verification of power management in the context of the overall system architecture

“Ageia’s 2nd-generation PhysX processor for cutting-edge video games is extremely high-performance, and power management was a serious issue, so it became our first foray into multi-voltage-domain design. Archpro’s multi-voltage verification tools detected design problems we had no other way to find, and helped us achieve first-silicon success,” said Howard A. Landman, Manager of Physical Design for Ageia technologies. “As we move forward to future projects with even more complex voltage management, I expect their tools will become absolute necessities.”

MaVeric is available now.

ArchPro at DAC
ArchPro will be demonstrating MaVeric at DAC next month. ArchPro will also be hosting technical seminars on multi-voltage design in their booth (#1580). These daily seminars will be delivered by ArchPro’s multi-voltage design experts.

ArchPro’s Multi-Voltage Solutions
ArchPro helps designers accelerate multi-voltage designs while using an existing, familiar flow. In addition to MaVeric, ArchPro products include, MVSIM, co-simulator for verification of power-managed designs; MVRC, multi-voltage rule checker; and MVSYN, automating the implementation of multiple voltage designs. ArchPro solutions have reached maturity with the following achievements:

  • Top-tier customers worldwide using for verifying multi-voltage designs
  • Proven across multiple process nodes including 90nm and 65nm with design sizes of 200M transistors
  • Only solution that has verified advanced power reduction techniques such as power gating, substrate biasing and Dynamic Voltage Frequency Scaling

About ArchPro
ArchPro provides EDA products to meet low-power and multi-voltage power management challenges facing SOCs at 90nm and below. Having launched many of the world’s first EDA products for power-managed, multi-voltage, low-power design environments that allow for design simulation, verification and implementation prior to silicon spins, ArchPro is paving the way toward reducing cost, risk, and time to market for chip designers. ArchPro is a member of ARM(r) Connected Community, Synopsys InSync program, Mentor Graphics VAP program, IEEE P1801 study group, Si2 Low Power Council, and Accellera. Recently, ArchPro joined Virage Logic’s VIP program. Privately held ArchPro is based in San Jose, Calif.