CebaTech Introduces CebaIP PlatformT for ASICs, FPGAs

CebaTech Inc., an innovative intellectual property (IP) developer using state of the art in-house electronic system level (ESL) development tools, announced the development of the CebaIP PlatformT. CebaTech’s modular approach to offering IP cores makes each configuration quick and easy for design engineers to integrate into their application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs).

The CebaIP Platform represents years of engineering experience in developing and deploying complex data and storage networking products. The platform is a protocol-complete hardware and software framework for developing end-to-end data and storage networking solutions. Using the CebaIP Platform’s integrated advanced direct memory access (DMA) controller with the OpenBSD software driver, designers are able to rapidly achieve complete data networking and storage product solutions.

The CebaIP Platform enables modular protocol-level connectivity between the media access controller (MAC) layer and host application layer interface. With supported data rates ranging from 1 Gb/s to 10 Gb/s, customers can choose from various platform configurations to meet the needs of their specific data and storage networking products. Implementation is supported for both ASICs and FPGAs.

“No other IP platform or subsystem offering dedicated to data and storage networking applications with this level of functional integration exists in the market,” said Chad Spackman, president of CebaTech. “Customers can choose from available platform configurations now, and grow with the platform over time to greater levels of integration and function to meet the changing demands of their respective markets.”

Platform configurations initially supported by the CebaIP Platform includes GZIP-based compression and decompression with optional advanced encryption standard (AES) support. A second configuration includes partial TCP/IP offload with optional link aggregation, VLAN, and large send offload (LSO) support. Both configurations are available with the CebaIP Platform advanced descriptor-based DMA controller and OpenBSD reference software driver.

GZIP-based compression and decompression is available now for initial customer engagements, with general availability in late second quarter of 2007. The partial TCP/IP offload configuration will be available in the third quarter of 2007. Future configurations-including full TCP/IP offload, Internet protocol security (IPSec), iSCSI initiator and target, RDMA, and advanced rule-based filtering-will be released in late 2007 and early 2008.

About CebaTech
CebaTech uses its innovative C2R CompilerT, along with a comprehensive silicon development methodology, to realize complex data and storage networking functions in easy-to-integrate intellectual property (IP) cores. CebaTech is privately held.

CebaIP, CebaIP Platform, and CebaIP Cores are trademarks of CebaTech Inc.