Renesas Unveils 960-MIPS, 800 MFLOPS Dual-Core Microcontrollers

Renesas Technology America, Inc. announced five new SuperH(R) 32-bit microcontrollers that use multi-core technology to achieve the high levels of performance required by many embedded system applications such as consumer products, industrial equipment, and car audio and navigation systems. The SH7205 and SH7265 devices incorporate two superscalar SH2A-FPU CPU cores and a comprehensive set of on-chip peripherals that includes USB, ATAPI, and image processing engine functions. When the dual-core microcontrollers are operating at their 200 MHz maximum operating frequency, each CPU delivers 480-MIPS (million instructions per second) processing performance in the Dhrystone v1.1 benchmark, and 400-MFLOPS (mega floating point number operations per second) floating-point operation performance.

Renesas Dual-Core 32-bit SuperH MicrocontrollerTo meet inevitable demands for higher functionality and performance, the new microcontrollers use a design approach fundamentally different from the traditional method. In the past, generations of ever-finer process nodes have been used to improve integration density and increase operating speed. Today, however, semiconductor technology has reached the point where it takes considerable time to develop finer manufacturing process nodes. Moreover, fundamental limits of physics now mandate design solutions for an expanding variety of difficult problems, such as increased leakage current.

To avoid these problems, Renesas developed a multi-core architecture for microcontrollers used in embedded applications. One of the main benefits of putting multiple CPU cores in a single chip is increased device performance because the CPU cores can execute lines of software code in parallel. The multi-core ICs for embedded systems previously introduced mostly have been aimed at image processing and similar multimedia products with heavy processing loads. By contrast, the SH7205 and SH7265 microcontrollers are general-purpose devices that target a broad span of applications requiring high-speed real-time control and processing performance equivalent to that of a digital signal processor (DSP) chip.

Multi-core architecture
The multi-core architecture of the SH7205 and SH7265 microcontrollers makes it possible to achieve high levels of performance while offering flexibility of use. The microcontrollers implemented a solution in which real-time processing performance does not degrade as processing becomes more complex and faster. The three main technologies in the CPU core’s design are:

  • The internal bus system uses a CPU-specific multi-layer structure. A 4-layer configuration provides two layers for CPU use and two for DMAC (direct memory access controller) use. This prevents time from being wasted while the bus is in use by the other CPU, for high-speed real-time processing.
  • The CPU cores can operate on different operating systems (OSs) or the same one. If one CPU core runs the µITRON OS, while the other runs the µClinux OS, for example, they can execute completely different programs. This capability lets engineers construct a system flexibly, according to its use or purpose.
  • The two CPU cores can communicate directly with each other. Each CPU can check the status of the other one, and they can exchange data using memory provided for that purpose. Thus, processing linkage can be implemented between the CPUs through mutual exchanges of their respective processing states and data.

On-chip peripheral functions
The extensive array of peripheral functions built into the SH7205 and SH7265 chips reduces the need for external parts and enables to create high-performance systems at less cost. They include a USB v2.0 High-Speed (480-Mbps) specification interface, ATAPI interface, and other various interfaces. The devices have a 2D graphic engine and a digital video input pin for graphic processing, and has WQVA-size (480×234-pixel) and QVA-size (320×240-pixel) analog RGB output pins for image and video output processing.

Other on-chip functions include a 5-channel multifunction timer unit (MTU) suitable for motor control systems, 2-channel CAN controller, 8-channel 10-bit A/D converter, 2-channel 8-bit D/A converter, watchdog timer (WDT), 14-channel DMAC with 2-dimensional addressing capability for speeding up video applications, and more.

Besides these functions, the SH7265 provides an encoding accelerator for AAC (Advanced Audio Coding) as the audio data compression method. This function can be used for high-speed hardware implementation of music data or similar AAC file creation.

System development tools
Customers can use currently available compiler, assembler, and linker products as a system development environment for the SH7205 and SH7265 microcontrollers. Additionally, Renesas is developing an enhanced version of the E10A-USB emulator with multi-core support and a dual-core OS, the µITRON HI7200/MP. This OS has an inter-CPU communication function that eases the implementation of application software and enables current software resources to be used in dual-OS operation.

About Renesas Technology Corp.
Renesas Technology Corp. is one of the world’s leading semiconductor system solutions providers for mobile, automotive and PC/AV (Audio Visual) markets and the world’s No.1 supplier of microcontrollers. It is also a leading provider of LCD Driver ICs, Smart Card microcontrollers, RF-ICs, High Power Amplifiers, Mixed Signal ICs, System-on-Chip (SoC), System-in-Package (SiP) and more. Established in 2003 as a joint venture between Hitachi, Ltd. (TOKYO:6501) (NYSE:HIT) and Mitsubishi Electric Corporation (TOKYO:6503), Renesas Technology achieved consolidated revenue of 906 billion JPY in FY2005 (end of March 2006). Renesas Technology is based in Tokyo, Japan and has a global network of manufacturing, design and sales operations in around 20 countries with about 26,200 employees worldwide.

SuperH is a registered US trademark of Renesas Technology Corp.