Crossware, a leading embedded software tools developer, has added software flash memory breakpoints to its ARM(R) Development Suite. This enhancement will enable an unlimited number of breakpoints to be set in flash memory resulting in faster debugging and reduced development timescales.
“This enhancement to our ARM Development Suite will enable programmers to overcome the limitations of hardware breakpoints which are traditionally used to halt program execution in flash memory,” said Alan Harry, founder and CEO of Crossware. “For example, the ARM7 debug module supports just two hardware breakpoints, and one of these is required for single stepping, leaving only one to be set by the developer.”
To facilitate the setting of software flash memory breakpoints, Crossware has exploited the ability of its Jaguar USB JTAG debugger interface to rapidly erase and rewrite flash memory sectors containing breakpoints. This is performed with minimal programmer/system interference.
Crossware has also added ‘register tool-tips’ to its ARM Development Suite. These ‘register tool-tips’ pop-up when the mouse hovers over a value in a register view and display the name of the register and list by name all of its bits and the value of each bit.
The Crossware ARM Development Suite provides a complete and extremely user friendly development environment for the ARM family of microprocessors and microcontrollers with its advanced C/C++ compiler, libraries, wizards, simulator, source level debugger and the Jaguar USB JTAG debugger interface.
Crossware is a leading developer of programmer-friendly C cross compilers and other development tools for embedded systems based on the 8051, ColdFire, ARM, 68000, CPU32 and other chip families. Host environments include Windows 9x, Windows NT, Windows 2000 and Windows XP. The company, founded by Alan Harry in 1984, is headquartered in the UK at Litlington on the outskirts of Cambridge. Crossware’s products are used throughout the world by professional developers, educational establishments and hobbyists.