Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC and FPGA devices, announced the release of co-simulation support for fixed-point in Simulink. Active-HDL coupled with The MathWorks Simulink provides support for fixed-point types and HDL co-simulation of black-boxes, which allows seamless integration with Simulink-based DSP tools.
Aldec’s new Simulink Interface simplifies verification of hardware designs in Active-HDL through robust data visualizations and several advanced design analysis tools. It provides for direct co-simulation of mathematical and HDL hardware components of system-level designs. The interface allows successive replacement of mathematical models describing the system operation with their equivalent target HDL components. The interface also reduces time-to-market by filling the gap between high-level abstraction of algorithmic modeling and FPGA and ASIC-oriented low-level hardware modeling.
Pricing and Availability
The Simulink Interface is available today and is provided as part of the standard Active-HDL (PE and EE) configuration for no additional charge. The interface is sold as a separate add-on option for all other product configurations. For a no-cost evaluation version of Active-HDL, please visit the company’s website.
Aldec, Inc., established in 1984, is committed to delivering high-performance, HDL-based design verification software for UNIX, Linux, Solaris and Windows platforms.
Active-HDL is a trademarks of Aldec, Inc.