Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, announced that LG Electronics of Korea has selected the Cadence(R) Encounter(R) Conformal(R) Constraint Designer technology as its constraint signoff tool for semiconductor design. The industry-leading tool has already saved weeks of manual effort from project designs at LG Electronics. As a result, the company said Encounter Conformal Constraint Designer technology will be used in their design flow—logic design, verification, and implementation—to ensure the quality of constraints and to validate and generate timing exception data. This marks the first adoption of Encounter Conformal Constraint Designer as a signoff tool by a Korean company.
In addition, LG Electronics uses Encounter Conformal Equivalence Checker XL, which provides complex datapath verification and advanced analysis and debug capabilities.
“By using the Encounter Conformal Constraint Designer as our constraint signoff tool, we were able to ensure highest quality of our design constraints at every design stage, from RTL to synthesis,” said Jang Jae Ryang, group leader of the System IC Planning Group at LG Electronics. “It also improves the quality of results through timing exception validation and generation. We project that this technology from Cadence can help reduce weeks of manual effort in ensuring design-constraint quality and correctness, to just a few hours.”
“The adoption of our Encounter Conformal Equivalence Checker and Constraint Designer technologies by LG Electronics confirms the value that Cadence’s constraint and signoff technologies bring to designers,” said Michael Chang, vice president of R&D for Cadence. “Constraint issues have been around for a long time, and there has been no automatic way of validating or generating constraints until now. With Encounter Conformal Constraint Designer, we can not only help designers automate the process, but also validate the correctness of constraints, thus improving the quality of results.”
The Encounter Conformal Constraint Designer solution—available in L and XL offerings—is the industry’s leading constraint validation, generation and management tool. It performs comprehensive design constraint checks, automatically generates correct top-level design constraints from block-level design constraints, validates and generates timing exceptions. It also writes out assertions to provide the link to both simulation and formal environment.
The Encounter Conformal Equivalence Checker solution—available in L, XL, and GXL offerings—verifies complex datapaths and provides easy-to-use analysis and debug capabilities. Encounter Conformal Equivalence Checker provides an independent verification to eliminate the risks associated with sharing technologies across design implementation and verification products.
Both products are key technologies of the Encounter digital IC design platform and components of the Cadence Logic Design Team Solution.
Cadence enables global electronic-design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2006 revenues of approximately $1.5 billion, and has approximately 5,200 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
Cadence, Encounter and Conformal are registered trademarks, and the Cadence logo is a trademark of Cadence Design Systems in the United States and other countries.