Design Automation Conference Reveals Technical Program

The Design Automation Conference (DAC), the electronic design automation (EDA) industry’s premier event, released the complete technical program for the 44th DAC, to be held June 4 – 8, 2007, at the San Diego Convention Center in San Diego. This year’s technical program features 161 papers selected out of 713 submissions, and is supplemented by eight special sessions, seven full-day tutorials, eight panels, 18 pavilion panels, and seven hands-on tutorials. The technical breadth of the program will offer insights and information on the latest advances in EDA for the approximately 11,000 attendees that visit DAC each year, including academics, researchers, developers, designers, managers, and executives in EDA, chip, and electronics companies.

This year’s conference features an automotive electronics theme, which will be seen in special presentations and sessions throughout the week. Automotive electronics will be the focus of an all-day track on Wednesday, June 6, including a special session, invited talks, a panel, and regular papers all providing an opportunity for attendees to hear from EDA, semiconductor and automotive industry representatives about the issues impacting automotive design. For example, a special session will feature presentations on aspects of defining, designing and using virtual automotive platforms to implement applications on shared hardware. In a pavilion panel that afternoon, presenters will explore the special needs for correctness and reliability in automotive software, and how car makers and the research community are meeting those requirements.

“This is an exciting time for the EDA industry with new developments emerging that have tremendous potential for the next decade,” said Steve Levitan, general chair of the 44th DAC executive committee. “This year’s program committee has culled the remarkable array of submissions from 25 countries and five continents and the result is a strong, varied technical program, which reflects our industry’s remarkable innovation.”

The program includes more than 53 technical sessions divided into 10 tracks: Analog/Mixed-Signal/RF and Simulation; Automotive Electronics; Business; DFM and the Manufacturing Interface; Interconnect and Reliability; Low-Power Design; New and Emerging Technologies; Physical Design, Synthesis and FPGA; System Level and Embedded Design; and Verification and Test. While this year’s technical program submissions did cover all ten tracks, more than 40 percent focused on the following hot topic areas: system design, low-power design, verification, and design for manufacturability, and as a result each of these topics is represented prominently throughout the program.

Tuesday afternoon will include a much-anticipated new WACI (Wild and Crazy Ideas) session highlighting out-of-the-box thinking. After receiving 54 submissions presenting early expositions of new ideas, the program committee selected eight papers, which will be presented in a short format designed to promote discussion among attendees.

Tuesday, June 5, will also focus on DAC’s business track beginning with a morning keynote, and continuing with an all-day management seminar titled “Innovation or Extinction – the choice is yours!” Three notable speakers – Dr. Geoffrey Moore, best-selling author and the founder of The Chasm Group; Dr. Raul Camposano, formerly chief technical officer and general manager of the Silicon Engineering Group at Synopsys, Inc.; and Dr. Jim Smith, general partner at Mohr Davidow Ventures – will provide a variety of perspectives on innovation with a focus on the unique challenges and opportunities of the electronics, semiconductor and EDA industries.

The program also features an array of panels spread throughout the conference with free-form discussions headed by EDA luminaries, addressing emerging and important areas in the field. The panels cover topics such as EDA mega-trends under shortening consumer cycles, handoffs between design and manufacturing, early power-aware design, and challenges in functional verification. On the exhibit floor, DAC will present an exciting series of pavilion panels on a variety of timely topics to stimulate discussion, such as trends in EDA, managing mixed-signal designs, DFM, system-level wireless design, and how to anticipate “the next killer app.”

Seven full-day tutorial presentations are scheduled for Monday, June 4, and Friday, June 8. These are presented by experts in the field, and cover themes such as yield and fabrication, system level design, verification using formal assertions, reliability under soft errors, power delivery concerns for die and package design, and low-power design techniques. A special tutorial on variability in design has been organized to foster joint education and research amongst the DAC and the International Solid State Circuits Conference (ISSCC) attendees.

Seven vendor-presented, hands-on tutorials are scheduled throughout the conference, covering a variety of DFM topics.

On Sunday, June 3, five workshops will be offered on the following topics: the design and verification of low-power ICs; integrated design systems; low-power design intent; UML for SoC design; and hardware-dependent software. On Monday, June 4, 2007, the annual Workshop for Women in Design Automation (WWINDA) will be held at DAC.

Advance conference registration opens today. To register for DAC call 800-321-4573 in the U.S. to request registration materials. The advance conference registration discount deadline is May 7, 2007.

About DAC
The Design Automation Conference (DAC) is the premier educational and networking event for Electronic Design Automation (EDA) and silicon solutions. More than 11,000 designers, developers, researchers, academics and managers from leading electronics companies and universities from around the world attend. DAC features close to 60 technical sessions covering the latest research on design methodologies and technologies, EDA developments and trends selected by a diverse committee of electronic design experts. A highlight is its Exhibition and Suite area with approximately 250 of the leading and emerging EDA, silicon and IP providers.