Aldec, Inc., a pioneer of mixed Hardware Description Language (HDL) simulation and advanced design tools for ASIC and FPGA devices, announced the release of a new Student Edition of Active-HDL(TM) 7.2. The student edition of Aldec’s professional Electronic Design Automation (EDA) software tools will be available at no-cost to all eligible students based on a one-year renewable term license. The product works on Windows and interfaces to all FPGA vendors synthesis and place/route tools providing a vendor independent design environment.
Graphical Design Entry and Mixed Simulation
The Student Edition of Active-HDL 7.2 includes a Hardware Description Language Editor (HDE) for VHDL and Verilog languages, a Block Diagram Editor (BDE) and a Finite State Machine (FSM) Editor. The BDE and FSM editors allow a student to visualize a logic circuit by designing it graphically in a structural or behavioral format before targeted a specific Hardware Description Language. Also included is Aldec’s industry proven mixed HDL simulator technology that can simulate mixed VHDL and Verilog designs through the use of a Testbench, written in VHDL, Verilog or SystemC code. The performance of the products simulation is restricted and the list of all restrictions and feature limitations can be found on Aldec’s website.
ESL Modeling Support
The Student Edition includes interfaces to both SystemC and the Mathworks’ Matlab/Simulink ESL modeling languages, allowing for co-simulation of designs developed in these two languages together with VHDL and Verilog. This is an important opportunity for the educational community seeking to link Software Engineers and Systems Engineers (using C-based tools), DSP circuit designers (using C/C++ or Matlab/Simulink) and custom logic circuit designers (using VHDL and Verilog) into one integrated environment.
Aldec, Inc., established in 1984, is committed to delivering high-performance, HDL-based design verification software for UNIX, Linux, Solaris and Windows platforms.
Active-HDL is a trademark of Aldec, Inc.