UMC Utilizes Apache's RedHawk-EV, Sahara-PTE for 90nm Designs

Apache Design Solutions, the leader in power signoff and complete silicon integrity platform solutions for system-on-chip (SoC) designs, announced that UMC’s 90nm reference design utilized Apache’s:

  • RedHawk-EV for full-chip static-IR, VCD and vectorless dynamic voltage drop, and electromigration (EM) analysis
  • Sahara-PTE for full-chip thermal analysis and thermal variation on leakage, timing, and reliability

“Apache delivers key technologies required to address the design challenges at 90nm and below,” said Ken Liou, director of the IP and Design Support division at UMC. “Accuracy and ease-of-use of RedHawk and Sahara are the key reasons why UMC has decided to add Apache to our list of supported tools for power and thermal analysis.”

Power integrity and thermal integrity has become one of the key design challenges, as process nodes move toward 90nm and below. Power noise such as dynamic voltage drop and ground bounce, as well as temperature variation can have significant impact on silicon’s leakage, timing, and reliability. The traditional method of over-designing and guard-banding is no longer sufficient to detect potential power and timing issues prior to tapeout. Apache’s RedHawk for power signoff and Sahara-PTE for power-thermal-electrical analysis deliver the industry’s only silicon integrity platform solution for 90nm and below process technologies.

“UMC is one of the leading drivers for industry’s advanced flow requirements and we are pleased to see RedHawk and Sahara as key components of the UMC 90nm reference design flow,” said Andrew Yang, CEO of Apache. “The collaboration between Apache and UMC benefits our mutual customers and allows us to address their power integrity and thermal management issues for silicon success.”

The UMC/Apache reference design flow is available now and can be accessed from UMC’s website.

About UMC
UMC (NYSE: UMC, TSE: 2303) is a leading global semiconductor foundry that manufactures advanced system-on-chip (SoC) designs for applications spanning every major sector of the IC industry. UMC’s SoC Solution Foundry strategy is based on the strength of the company’s advanced technologies, which include production proven 90nm, 65nm, mixed signal/RFCMOS, and a wide range of specialty technologies. Production is supported through 10 wafer manufacturing facilities that include two advanced 300mm fabs; Fab 12A in Taiwan and Singapore-based Fab 12i are both in volume production for a variety of customer products. The company employs approximately 12,000 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States.

About Apache’s Silicon Integrity Platform
Apache’s Silicon Integrity Platform (ASIP) is a fully integrated physical design analysis, debugging, and optimization platform that consider impact of all noise sources associated with advanced nanometer designs. ASIP considers concurrent and interdependent effects of advanced nanometer phenomena such as dynamic power, leakage, crosstalk, package/system IO, temperature, and substrate noise on silicon behavior to ensure first-silicon tapeout success. This vendor neutral platform enables designers to adopt any industry standard physical design flow, while providing a unified environment of extraction, characterization, simulation, and optimization for design analysis and optimization. ASIP delivers transistor-level accuracy with cell-based capacity and performance to address today’s toughest design challenges.

About Apache Design Solutions
Apache delivers the leading power sign-off solution adopted by 70% of top semiconductor companies and a complete platform solution for silicon integrity of low-power, high-performance system-on-a-chip (SoC) designs. Apache’s innovative platform considers all sources of noise that impacts the design–such as power, signal, package / system IO, substrate, and temperature—Apache’s silicon integrity platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache’s vendor-neutral solution enables designers to adopt any industry-standard physical design flow and is certified by TSMC’s 5.0, 6.0, and 7.0 Reference Flow (NYSE: TSM). Apache has direct sales and support offices worldwide with over 40 customers, including 8 of the top 10 semiconductor companies.