Mentor Graphics Corporation (Nasdaq: MENT) announced two significant customer achievements using its ADVance MS(TM) (ADMS) mixed-signal verification platform. ADMS is a scalable platform that has been architected for mixed-signal functional verification. The platform integrates a suite of simulation tools, Eldo(R), Eldo RF, and ADiT(TM) for transistor-level simulation, as well as Questa(TM) for logic-level simulation. ADMS provides versatile capabilities that enable designers to verify that their designs are correct in either a digital-centric or analog-centric design flow.
AMS SoC Verification with ADVance MS
Portable consumer electronics and wireless products have become the dominant force in today’s global electronics market. Relentless demand for new features and functionality in these devices is driving unprecedented integration of RF, analog, and mixed-signal applications. This trend toward AMS SoC integration requires the ability to verify designs at the full chip level with special attention to digital and analog interactions.
UMC, a world-leading semiconductor foundry (NYSE: UMC; TSE: 2303), verified a complete transceiver reference design that included a combination of design representations such as digital languages, analog mixed-signal behavior languages, SPICE models and fast SPICE models (ADiT) by leveraging the seamless integration of various simulation engines offered via the ADMS platform.
“Through our collaboration with Mentor, we successfully validated a full chip mixed-signal transceiver reference design in our 130nm mixed-signal process using Mentor’s ADMS technology,” said Patrick Lin, chief SoC architect, system and architecture support, UMC. “With the combination of our reference design and the ADMS methodology, we are providing our mixed-signal customers another approach to achieve shorter time-to-market with our advanced mixed-signal processes. The combined methodology is slated to be demonstrated in a series of events starting with a demo at DAC 2007.”
Mixed-signal Design Verification with ADiT
Nanometer mixed-signal designs increasingly exhibit analog behavior. Battery powered portable device types bring additional complexity because of the fluctuation in power supply. These challenges have rendered traditional fast-SPICE tools inadequate for verification purposes. The latest breakthrough in the ADMS verification platform is ADiT, a fast-SPICE simulator developed and optimized specifically for nanometer mixed-signal applications such as PLL, DLL, DAC, ADC, LDO, and SERDES.
“ADiT delivers excellent convergence and the performance required for our low-power wireless applications. Especially, the near out-of-box accuracy of ADiT reduces the effort for tuning the simulator and increases overall productivity,” said Christian Caillon, components development director, cellular terminal division, STMicroelectronics. “The efficient integration into ADMS also provides a seamless transition into our mixed-signal, full chip verification methodology.”
“We are delighted that our customers achieved design success with our verification technologies,” said Jue-Hsien Chern, vice president and general manager, deep submicron division, Mentor Graphics. “Through close collaboration with our partners, we have developed leading edge technologies for AMS SoC design.”
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $800 million and employs approximately 4,250 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Mentor Graphics and Eldo are registered trademark and ADVance MS, ADiT and Questa are trademarks of Mentor Graphics Corporation.