Xilinx, Inc. (NASDAQ: XLNX), the world’s leading supplier of programmable solutions, announced the availability of protocol packs for PCI Express(R), Gigabit Ethernet, and XAUI for its 65-nm Virtex-5 family of FPGAs. The company also released protocol-specific characterization reports for SONET OC-48/SDH STM-16 and CPRI (Common Public Radio Interface). Each standard protocol pack includes protocol specific physical layer characterization reports, interoperability and compliance reports, intellectual property (IP) cores and documentation to facilitate low-risk and efficient implementation of standardized high-speed serial protocols in Virtex(TM)-5 FPGAs.
“Xilinx has taken the first step to set a direction for the FPGA industry by offering more than just compliance and interoperability information – now offering protocol packs which include protocol specific characterization reports and IP,” said Jag Bolaria, senior analyst at The Linley Group, a leading market research firm. “Now FPGA customers can take advantage of characterization data that is typical for ASSPs, which unlike FPGAs are a point product and do not have to deal with a broad range of applications.”
With twelve of the fifteen announced Virtex-5 family devices shipping today, the protocol packs serve to further enable rapid customer adoption. “As the adoption of high-speed serial I/O protocols continues to increase, our Virtex-5 LXT and SXT devices with their low-power RocketIO GTP transceivers are being deployed in a growing variety of applications,” said Steve Douglass, vice president and general manager of the Advanced Products Division at Xilinx. “By providing protocol-specific device characterization across process voltage and temperature, Xilinx is not only enabling faster design closure and reducing risk, but is also taking a tremendous leap forward in the FPGA business.”
Rigorous Test and Characterization
Virtex-5 LXT samples have been available since May 2006 and all Virtex-5 available devices are now characterized across process corners, voltage and temperature (PVT) for key transceiver performance specifications (such as transmit jitter generation and jitter tolerance), compliance test suites, and rigorous test programs and with third party devices to ensure predictable performance in user applications. The RocketIO(TM) GTP transceivers in Virtex-5 devices support a multitude of protocols. With protocol specific characterization of this kind, users can reduce design cycle time by orders of magnitudes. To achieve this milestone, Xilinx has employed a layered characterization methodology testing the common aspects of multiple protocols first and then testing protocol-specific requirements.
In addition to protocol characterization, each protocol pack provides interoperability certification data of the solution (device, hard and soft IP including PHY and link layers) ensuring compliance with a standard’s specifications. Xilinx actively participates at standards body certification events to ensure compliance.
|PCI Express||Server, Storage, Networking, Embedded||On-board control plane, Chip-to-Chip, and Plug-in cards|
|Gigabit Ethernet||Server, Storage, Networking, Embedded||LAN, SAN|
|XAUI||Communications, Networking & Embedded||Fabric interface chips (FIC) & Back-plane|
|OC-48/STM-16||Communications & Networking||MAN & WAN|
About Xilinx Virtex-5 FPGAs
Built upon the industry’s most advanced 65nm triple-oxide technology, breakthrough new ExpressFabric technology and proven ASMBL(TM) architecture, the Virtex-5 family represents the fifth generation in the award-winning Virtex product line. Key design team innovations in process technology, architecture and product development methodology have led to unprecedented performance and density gains with Virtex-5 FPGAs while consuming 45 percent less area than previous generation 90nm FPGAs..
Pricing and Availability
Xilinx protocol packs are available for free download. Xilinx registration and license agreements may apply.
Xilinx is the worldwide leader in complete programmable logic solutions.