Mentor Graphics Gives Lowdown on Low Power at DVCon
Mentor Graphics Corporation (Nasdaq: MENT) announced its participation in the Design and Verification conference (DVCon) in San Jose, California February 21 – 23, 2007. On Thursday, February 22 from 12:00-1:30 p.m. Mentor will host “The Lowdown on Low Power – Views from the Experts,” moderated by Richard Goering, EE Times Editor.
Panelists include:
- Cadence Design Systems – Pankaj Mayor
- ChipVision – Thomas Blaesi
- LSI Logic – Gary Delp
- Mentor Graphics – Dennis Brophy
- Synopsys – Michael Keating
On Friday, February 23 at 9:00 a.m., Harry Foster, principal engineer for Mentor Graphics’ Design Verification and Test division will moderate the panel “Blended Coverage – A Recipe for Success.” Mr. Foster recently won Accellera’s 3rd annual Technical Excellence Award for his contributions to Accellera’s Open Verification Library (OVL) standard.
Panelists include:
- Advanced Micro Devices (AMD) – Jerry Vauk
- Mentor Graphics – Peter Lafauci
- Hewlett-Packard – David Lacey
- Rambus – Prakash Rashinkar
- Oski Technology – Vignyan Singhal
Mentor Graphics will also present a number of papers, tutorials and demonstrations at the conference. A full listing is available online. More information about DVCon is also available online.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $800 million and employs approximately 4,250 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Mentor Graphics is a registered trademark of Mentor Graphics Corporation.
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