Mentor Graphics Corporation (Nasdaq: MENT) announced that Samsung Electronics India Software Operations (SISO) has selected Mentor’s 0-In(R) suite of verification tools for hardware development. SISO Pvt. Ltd., based in Bangalore, is a wholly owned subsidiary of Samsung Electronics Company Limited, South Korea, employing over 900 employees in research and development. SISO uses Mentor Graphics 0-In verification suite, which includes the Clock Domain Crossing (CDC) verification environment, the CheckerWare(R) assertion and interface protocol monitor libraries, along with the ModelSim(R) and 0-In Formal Verification products, to verify a broad range of hardware products for the telecom, wireless and multimedia/digital media markets.
“We want to use the best-in-class tools in our design methodology. Mentor Graphics 0-In fits the bill in this regard. Moreover, Mentor Graphics tools provide seamless interoperability with other tools in the EDA ecosystem. Together, it makes sound business logic to have a tool partnership with Mentor Graphics.” states Jailendra Kumar, General Manager and Head, System LSI Division, SISO. “The proactive support from Mentor Graphics for engineering and applications are equally important to SISO.”
“We are proud of our relationships with leading companies like Samsung Electronics. They value Mentor’s best-in-class technologies and superior verification methodologies, which improve the efficiency of their design processes,” stated Steven D. White, General Manager of Mentor Graphics 0-In functional verification business unit. “Our unique CDC verification solution delivers a comprehensive approach for identifying synchronization problems, data-dependent transfer protocol violations, and data reconvergence errors. Incorporating Mentor’s 0-In CDC technology into their development process helps Samsung deliver leading edge products with the highest degree of confidence.”
Mentor’s Clock Domain Crossing as the De Facto Standard
Clock domain crossing errors represent a serious and growing challenge to electronic design. CDC problems are the second highest reported reason for silicon re-spins, but CDC integrity is a phenomenon that traditional verification techniques do little to address. Many industry leaders (including Samsung) have dramatically reduced the risk of having CDC errors undetected until silicon by adopting Mentor’s 0-In CDC solution, which is now a worldwide standard methodology within design flows. 0-In CDC gives Samsung the benefits of both static analysis and dynamic transfer protocol checking. In addition, 0-In CDC verifies the design’s tolerance for metastability in silicon with its unique CDC-FX tool that injects the effects of metastability into simulation using existing testbenches. 0-In CDC, along with CheckerWare assertions and interface protocol monitors, has helped SISO reach verification closure more quickly and with more confidence. In addition, Mentor’s on-site technical support provides smooth and fast technology adoption, which is vital to the SISO R&D organization with its broad application areas.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $750 million and employs approximately 4,100 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Mentor Graphics, 0-In, CheckerWare and ModelSim are registered trademarks of Mentor Graphics Corporation.