LogicVision, Inc. (NASDAQ: LGVN), a leading provider of semiconductor test and yield learning solutions, announced the release of a new production version of the ETAccess family of products, offering integrated data-logging capabilities for LogicVision’s line of ETCreate design for test (DFT) IP for memory and logic. This new release introduces two major components; ETProduction and ETDiagnostics, each offering semiconductor designers fast debugging and silicon bring-up capabilities. Both components offer seamless integration to popular Automatic Test Equipment such as the recently announced integration with Teradyne test systems.
ETProduction is a batch-mode, high-speed production test and failure data-log capability, now seamlessly integrated into and included at no extra charge with all of LogicVision’s ETCreate DFT tools. Designs completed with LogicVision’s ETCreate products utilize ETProduction to create an automated vector-less production test module that is inserted into a device ATE test program. ETProduction saves valuable test engineering costs by eliminating pattern translation errors that are often found between WGL and STIL vectors and tester binary vectors, thus eliminating time consuming pattern debug activities. It fully describes fail information directly, eliminating the complexity of back annotating vector locations into failed mechanisms.
During production test, ETProduction can be switched between pass/fail and data-logging; both of which are fully interpreted in real-time, with STDF compliant output data. Once ETProduction is inserted into the device test program it can be sent to any tester in any geographic location without the need for licensed server software.
ETDiagnostics is an add-on option to the ETCreate product family that provides an interactive graphical environment to enable component level debug and diagnostic of silicon devices incorporating LogicVision’s embedded test IP. ETDiagnostics directly interacts with the device test program failure data to provide real-time diagnosis down to the discrete memory cell or logic gate. Because ETDiagnostics uses the ETCreate design library as a reference, it automatically re-computes testbenches for detailed diagnostic interrogation without the complex, time consuming and costly, testbench and pattern regeneration performed by design engineering. An easy to use and intuitive GUI accelerates silicon bring-up, characterization and yield learning.
“Chip designers and manufacturers are demanding higher returns on their test investment,” said Farhad Hayat, vice president of marketing at LogicVision. “The newest release of ETAccess provides significant value to customers who use our embedded test IP to reduce test costs and improve package yields. ETAccess reduces the cost and time of test development and accelerates silicon bring-up from weeks to days or hours.”
About LogicVision Inc.
LogicVision, Inc. provides unique test and yield learning capabilities in the design for manufacturing space. These capabilities enable its customers, leading semiconductor companies, to more quickly and efficiently learn to improve product yields. The company’s advanced Design for Test (DFT) product line, ETCreate, works together with ETAccess and Yield Insight yield learning applications to improve profit margins by reducing device field returns, reducing test costs, and accelerating both time to market and time to yield. LogicVision solutions are used in the development of semiconductor ICs for products ranging from digital consumer goods to wireless communications devices and satellite systems. LogicVision was founded in 1992 and is headquartered in San Jose, Calif.
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