IMEC Showcases High-Performance Germanium (Ge) pMOS Device

At today’s IEEE International Electron Devices Meeting, IMEC presents high-performance germanium (Ge) pMOS devices using a silicon (Si) compatible process flow. The hole mobility obtained in these devices is up to 2.7 times higher than the universal hole mobility for silicon. This result is obtained without using enhancement techniques such as strain. Record drain currents were also achieved for Ge devices with the shortest gate length ever reported.

TEM of a Ge pMOS with a physical gate length of 0.125µm and an extremely smooth gate dielectric

Recently, Ge has emerged as a very promising high-mobility channel material for future nanoscale pMOS devices, showing even higher potential than strained silicon. Until now, however, Ge results have been limited to either long-channel or ring-shaped devices. Today, IMEC presents both excellent mobility for long-channel devices and high drive currents for short-channel devices with gate lengths down to 125nm.

A peak mobility of 315 cm2/Vs was achieved for a typical 10µm x 10µm device. The effective oxide thickness (EOT) is approximately 1.2nm with a gate leakage less than 0.01 A/cm2. Gate lengths down to 125nm were also realized, which are to our knowledge the shortest ever reported. The highest Ge pMOS drain current to date of 670µA/µm for a gate length of 190nm and Vd of -1.5V was obtained.

The pMOS devices were fabricated in a Si-compatible process flow using 200mm Ge-on-Si wafers from ASM. The Ge top layer of the wafers was grown epitaxially directly on silicon. The gate deposition sequence started with Ge surface passivation consisting of an ultra-thin (~0.6nm) epitaxial Si layer which was partially oxidized after growth. To avoid further oxidation, the Si passivation layer was immediately capped by a 4nm atomic-layer deposited HfO2 gate dielectric from an ASM Pulsar 2000 reactor followed by 10nm TaN and 80nm TiN deposited using physical vapor deposition.

Future research targets to further improve the devices by implementing strain, optimization of the ion implantation conditions and further scaling of the gate length.

These results were obtained within IMEC’s core program on (sub-)32nm CMOS, which joins forces from nine of the world’s leading IC manufacturers or foundries (Infineon, Intel, Micron, NXP, Panasonic, Samsung, STMicroelectronics, Texas Instruments and TSMC).

About IMEC
IMEC is a world-leading independent research center in nanoelectronics and nanotechnology. Its research focuses on the next generations of chips and systems, and on the enabling technologies for ambient intelligence. IMEC’s research bridges the gap between fundamental research at universities and technology development in industry. Its unique balance of processing and system know-how, intellectual property portfolio, state-of-the-art infrastructure and its strong network of companies, universities and research institutes worldwide position IMEC as a key partner for shaping technologies for future systems.

As an expansion of its wireless autonomous microsystems research, IMEC has created a legal entity in the Netherlands. “IMEC-Nederland” runs activities at the Holst Centre, an independent R&D institute that develops generic technologies and technology platforms for autonomous wireless transducer solutions and systems-in-foil. IMEC is headquartered in Leuven, Belgium, and has representatives in the US, China and Japan. Its staff of more than 1450 people includes more than 500 industrial residents and guest researchers. In 2005, its revenue was EUR 197 million.