Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, and Semiconductor Manufacturing International Corporation (SMIC) (NYSE: SMI; SEHK: 0981.HK) today announced a new collaboration to deliver the Cadence(R) RF (Radio-Frequency) Design Methodology Kit to the China RF IC design market. SMIC will develop process-design kits (PDKs) that will support the Cadence RF Design Methodology Kit and will validate the PDKs in a test chip by the end of 2006.
The CMOSRF 180-nanometer PDKs will be available to customers by the end of 2006. Cadence and SMIC will jointly deliver RFIC methodology workshops and provide RF Kit Applicability Consulting to Chinese RF designers.
With this collaboration, wireless chip designers in China will have the necessary tools to achieve shorter, more predictable design cycles by ensuring that silicon performance matches design intent. As part of their joint effort, both companies will also offer applicability training and workshops.
“There are many techniques peculiar to wireless. A design kit with recommendations on methodologies and tools is a benefit to our customers. Our collaboration with Cadence on RF design will help customers in China design and deliver high-quality RF devices,” said Paul Ouyang, vice president of Design Services at SMIC. “The combination of the Cadence advanced full-custom RF IC design technologies, RF Methodology Kit with SMIC¡¯s RF CMOS process technologies will offer the highest levels of quality and productivity enabling silicon success for our customers. We look forward to continuing our close partnership with Cadence to provide to our mutual customer a joint RF IC solution based on 130-nanometer and 90-nanometer RF CMOS processes.”
The RF Methodology Kit includes an 802.11 b/g WLAN transceiver reference design, a full suite of block-, chip-, and system-level testbenches, simulation setups, test plans, and applicability training on the RF design and analysis methodologies. The kit focuses on top-down RF IC design and full-chip verification and addresses behavioral modeling, circuit simulation, layout, parasitic extraction and resimulation, and inductor synthesis. It also focuses on IC verification within a system context, leveraging system-level models and testbenches for use by designers in the IC environment.
“We are pleased to collaborate with SMIC on a key effort to help customers in the Chinese RF-design market improve the quality and productivity in the design of their RF devices,” said Jan Willis, senior vice president of Industry Alliances at Cadence. “We look forward to jointly engaging mutual customers through workshops and RF Applicability training in China throughout 2007.”
SMIC (NYSE: SMI; SEHK: 0981.HK) is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in Mainland China, providing integrated circuit (IC) manufacturing service at 0.35um to 90 nanometers and finer line technologies. Headquartered in Shanghai, China, SMIC operates three 200mm fabs in Shanghai and one in Tianjin, and one 300mm fab in Beijing, the first of its kind in Mainland China. SMIC has customer service and marketing offices in the U.S., Italy, and Japan as well as a representative office in Hong Kong.
Cadence enables global electronic-design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2005 revenues of approximately $1.3 billion, and has approximately 5,200 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
Cadence is a registered trademarks and the Cadence logo is a trademark of Cadence Design Systems, Inc.