CoWare to Discuss EDA Challenges for Complex SoC and ASIC Designs
CoWare(R), Inc., the leading supplier of platform-driven electronic system-level (ESL) design software and services, announced that it will participate in a panel discussion entitled “EDA Challenges for Complex SoC and ASIC Designs” at the 4th International System-on-Chip (SoC) Conference & Exhibit, November 2 in Newport Beach Calif.
A.K. Kalekos, vice president of marketing and business development, CoWare, will represent CoWare on the panel.
The panel is entitled “EDA Challenges for Complex SoC and ASIC Designs” and will be moderated by Dave Bursky, former EE Times semiconductor editor. Other companies represented on the panel include Sequence Design, ViASIC, Magma Design Automation, and Takumi Technology.
The panel will take place on Thursday, November 2nd at 5:15 p.m. to 6:15 p.m.
The panel and conference will be held at the Radisson Hotel Newport Beach, Pacific Ballroom, 4545 MacArthur Boulevard, Newport Beach, Calif.
For information about the panel and the conference, go online.
About CoWare
CoWare is the leading supplier of platform-driven electronic system-level (ESL) design software and services. CoWare offers a comprehensive set of ESL solutions that enable electronics companies to “differentiate by design” through the creation of system IP including embedded processors, on-chip buses, and DSP algorithms; the architecture of optimized system-on-chip (SoC) platforms; hardware/software co-design; and virtual hardware platforms for device software development. The company’s solutions are based on open industry standards including SystemC. CoWare’s customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare is headquartered in San Jose, Calif., and has offices around the world.
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