Magma to Showcase Design-for-Test (DFT), DFM Solutions at ITC

Posted by EDA Geek News Staff in EDA Tools on Thursday, October 19, 2006

Magma(R) Design Automation Inc. (Nasdaq: LAVA), a provider of semiconductor design software, today announced it will showcase advanced design-for-test (DFT) and design-for-manufacturability (DFM) solutions at the International Test Conference Oct. 24-26 in Santa Clara. Featured demonstrations will highlight the interoperability between Magma's Blast Create(TM) physical synthesis flow and DFT tools from major vendors Genesys Testware, LogicVision, Mentor Graphics and Virage Logic.

Meeting design constraints such as area, timing and power is becoming more difficult at nanometer technologies and designers are struggling to maintain predictable schedules. Magma's comprehensive DFT solution is integrated within the Blast Create flow, improving predictability, eliminating iterations and decreasing time to market. Magma's DFT flow provides an efficient component test, but it can also be leveraged for silicon debug, failure diagnosis and trend analysis for yield management.

"Not only is DFT a required technology in the RTL-to-GDSII flow, it is critical very early in the design process to avoid netlist-to-RTL iterations. Blast Create's integrated DFT checks improve the quality of RTL before committing a netlist for implementation, ensuring that the RTL and the netlist do not violate basic design rules," said Kam Kittrell, general manager of Magma's Design Implementation Business Unit. "We are pleased to demonstrate the interoperability of Blast Create with our partners' DFT tools and to provide a complete, proven DFT solution to our mutual customers."

Visit Magma in booth 118 at this year's International Test Conference to learn about Magma's DFT and DFM offerings. Magma's presentations and demonstrations include:

  • Interoperability between the Blast Create flow and LogicVision's LV 2005, which enables a proven LBIST solution.
  • An automated memory BIST and repair solution that integrates Genesys Testware's ArraytestMaker(TM) test, diagnosis and repair tool into the Blast Create flow, simplifying the overall flow by removing the need to import and export design data into Blast Create.
  • Interoperability between the Blast Create flow and Mentor Graphics' TestKompress for test vector compression and MBISTArchitect for memory BIST and repair.
  • Interoperability between the Blast Create flow and Virage Logic's STAR Memory System for an integrated embedded memory test and repair solution
  • Using Magma's model-based Blast Yield(TM) TX and TSMC's 65-nm design ecosystem to leverage fab-related data and know-how to improve yield; to control design variability by modeling lithography effects within the flow to achieve higher performance and lower leakage; and to assess compliance with foundry DFM rules that will simplify handoff to manufacturing.
  • A lecture entitled "Manufacturability-Driven Physical Synthesis" by Dr. Patrick Groeneveld, Magma's chief technologist, at the IEEE International Workshop on DFM & DFY. The workshop is co-located with ITC.

About Magma
Magma's software for integrated circuit (IC) design is recognized as embodying the best in semiconductor technology. The world's top chip companies use Magma's EDA software to design and verify complex, high-performance ICs for communications, computing, consumer electronics and networking applications, while at the same time reducing design time and costs. Magma provides software for IC implementation, analysis, physical verification, characterization and programmable logic design, and the company's integrated RTL-to-GDSII design flow offers "The Fastest Path from RTL to Silicon"(TM). Magma is headquartered in Santa Clara, Calif. with offices around the world. Magma's stock trades on Nasdaq under the ticker symbol LAVA.

Magma is a registered trademark, and Blast Create, Blast Yield and "The Fastest Path from RTL to Silicon" are trademarks of Magma Design Automation.

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