With time-to-market pressures mounting for complex 90nm and 65nm SoC designs, MIPS Technologies, Inc. (Nasdaq: MIPS) today unveiled a new platform strategy for its entire range of MIPS(R) processors. The fully verified SOC-it(R) Platform and supporting environments will ease the design of high-performance MIPS-Based(TM) SoCs, lowering costs, accelerating time-to-market and reducing development risk.
The architecture will be implemented with MIPS Technologies and partner intellectual property (IP), with all platform usages fully tested and validated under the company’s new MIPS-Verified(TM) program. MIPS Technologies will leverage its extensive ecosystem, including software tool and RTOS vendors, and IP and Electronic System-Level (ESL) companies to ensure full software support for SOC-it Platforms.
“This is a winning strategy for MIPS Technologies as well as our customers,” said Mike Uhler, chief technology officer, MIPS Technologies. “Combining industry-standard architecture and processor cores, strategic partnerships, and robust ecosystem of hardware and software support onto a single platform, MIPS Technologies helps enhance productivity, shorten design time and rapidly deliver next-generation products to market.”
The SOC-it Platform is a defined set of components for use in platform-based designs with MIPS(R) cores. MIPS Technologies is defining the basic hardware platform as well as a Hardware Abstraction Layer (HAL), allowing the underlying hardware to be changed without affecting software compatibility.
There are two elements of the hardware platform: The first part is a hardware kernel of components, available directly from MIPS Technologies. This consists of functionality critical to maximizing system performance, including the memory sub-system, interrupts and on-chip interconnect. The second consists of the common peripherals required in most embedded systems today, including Real Time Clock (RTC), Serial port (UART) and General Purpose I/O (GPIO). Customers may choose the source of the common peripheral IP, but still retain software compatibility by use of the HAL.
The first component of the SOC-it Platform is the SOC-it(R) L2 Cache Controller, designed to minimize memory latency, reducing system costs and power consumption. Fully synthesizable, the SOC-it L2 Cache Controller works seamlessly with all MIPS Technologies OCP-based cores and uses standard cell libraries and memory arrays. The SOC-it L2 Cache Controller is available today to early access customers.
With availability estimated for Q1 CY 07, the SOC-it(R) System Controller uses a crossbar bus structure suitable for low latency and high bandwidth applications, providing an optimal interface to DDR/DDR2 system memory. Additional components include an SRAM controller, interrupt controller and bus controller for off-chip devices such as ROM/RAM memories.
About MIPS Technologies
MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer, networking, personal entertainment, communications and business applications. The company drives the broadest architectural alliance that delivers 32- and 64-bit embedded RISC solutions to the embedded market, and in combination with its licensees, offers the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products worldwide. MIPS Technologies licenses its intellectual property (IP) to today’s leading semiconductor companies, ASIC developers and system OEMs.
Today, MIPS-Based designs are integrated in millions of products around the world, including broadband devices from Linksys, digital cameras from Canon, DTVs and entertainment systems from Sony, DVD Recordable devices from Pioneer, digital set-top boxes from Motorola, network routers from Cisco and laser printers from Hewlett Packard. Founded in 1998, MIPS Technologies is based in Mountain View, California, with offices worldwide. For more information, please contact (650) 567-5000.
MIPS, MIPS-Based, MIPS-Verified and SOC-it are trademarks or registered trademarks of MIPS Technologies, Inc. in the United States and other countries.