Parsec COTS PMC Module Leverages Altera's Stratix II GX, Stratix FPGAs

Parsec has announced the release of the PM432, the latest addition to its range of Commercial off-the-shelf (COTS) PCI Mezzanine Cards (PMC). The PM432 is a single PMC module that leverages Altera’s Stratix II GX FPGAs to provide a high-speed, high-bandwidth processing platform, ideally suited for Software Defined Radio (SDR), WiMAX, radar, video and other computation and bandwidth intensive applications.

An Altera EP2SGX90 Stratix II GX FPGA implements a processing node that provides the user with an unprecedented combination of serial I/O bandwidth, logic and memory resources and DSP performance. Four Stratix II GX serial transceiver channels each provide up to 3.125 Gigabits per second (Gbps) full-duplex bandwidth via HSSDC2 front panel connectors, supporting protocols like Serial RapidIO(TM), Fibre Channel, Gigabit Ethernet and SerialLite II via the use of IP cores. DSP, video and communication functions, i.e. digital up- and down-conversion, FFT, FIR, 2D convolution, Viterbi and Turbo decoders (FEC) are easily implemented with the 90,960 Logic Elements, 192 18×18-bit embedded multipliers and 4.3 Mbits of internal RAM provided by the Stratix II GX FPGA. Five 512Kx36 (18Mb) ZBT(R) memories individually connect to the Stratix II GX FPGA, yielding 2.66 Gbytes/sec of memory bandwidth.

The Stratix II GX FPGA also configures from an on-board flash memory upon power-up. The flash memory stores two processing FPGA configurations and is programmed with software via the PCI bus.

An Altera EP1S10 Stratix FPGA implements a PCI-to-Local-Bus bridge with a 64-bit 66MHz PCI bus interface, supporting maximum PCI bandwidth (533 MBytes/sec) to and from the processing FPGA via the separate 64-bit Target and DMA buses. From Pn4, 64 PMC user I/Os connect to the processing FPGA.

The PM432 is shipped with Altera’s SerialLite II reference design and C sample software source code to provide a starting point for user firmware and software development. An optimized device driver for Windows 2000/XP forms part of the PM432 development suite. An FFT reference design with Matlab demonstration and API is also available, for use with Parsec’s PM480 ADC and PM488 DAC PMC modules.

The PM432 forms part of Parsec’s Compact PCI and PMC product range that is designed for applications requiring high-speed processing and high-bandwidth data throughput (SDR, EW, radar, video, communication systems etc.).

About Parsec
Founded in 1993, Parsec is a world class player in the outsourced development and manufacturing market. Based in custom designed facilities located in Highveld Techno Park, South Africa, Parsec designs and produces customized electronic sub-systems for clients in the defense/aerospace, telecommunications and industrial market sectors. Parsec’s primary objective is to enhance the competitiveness of its clients, which include research institutes, OEMs, product development houses as well as system integrators.

Parsec is an Altera ACAP(R) Partner with expertise in, amongst others, the EW, radar and video application fields.